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new 86152703b [FIX][TARGET] Skip Arm target tags when LLVM lacks Arm
backends; bump to 0.1.0a4 (#93)
86152703b is described below
commit 86152703b09734ef7600b3edd2f6deac3a54af2d
Author: Tianqi Chen <[email protected]>
AuthorDate: Mon Oct 26 22:20:58 2026 -0400
[FIX][TARGET] Skip Arm target tags when LLVM lacks Arm backends; bump to
0.1.0a4 (#93)
Tags with an Arm LLVM target or host (Arm CPU boards, Raspberry Pi,
Jetson boards with an LLVM host, Apple Metal) are parsed when `tvm_tirx`
is imported. On a native-only LLVM, such as the base wheel without the
`all-targets` add-on, parsing them prints Arm feature warnings and
invalid `-mcpu` errors.
This PR adds `codegen.llvm.backend_enabled(mtriple)` next to
`get_targets()` and builds it on that function: `aarch64`/`arm64`
triples need the `aarch64` backend, and `arm`/`thumb` triples need the
`arm` backend. Arm-hosted tags register only when the matching backend
is enabled. Builds without LLVM still register them as before. The Metal
tags now use this check instead of CPU-name validation. The tag files
import `codegen.llvm` inside the registering function, which avoids an
import cycle with `tvm_tirx.target`. The Jetson AGX Thor tag test is
skipped when the AArch64 backend is unavailable.
This PR also bumps the version from 0.1.0a3 to 0.1.0a4 in CMake, the
runtime header, both Python package metadata files, and `libinfo`.
---
CMakeLists.txt | 2 +-
ci/wheel/tvm-tirx-llvm-targets/pyproject.toml | 4 +--
include/tvm/runtime/base.h | 2 +-
pyproject.toml | 2 +-
python/tvm_tirx/backend/cuda/target_tags.py | 11 ++++++--
python/tvm_tirx/backend/metal/target_tags.py | 9 +++----
python/tvm_tirx/codegen/llvm.py | 35 ++++++++++++++++++++++++++
python/tvm_tirx/libinfo.py | 2 +-
python/tvm_tirx/target/tag_registry/arm_cpu.py | 12 +++++++--
tests/python/target/test_target.py | 4 +++
10 files changed, 67 insertions(+), 16 deletions(-)
diff --git a/CMakeLists.txt b/CMakeLists.txt
index 74f551cbd..cb664d142 100644
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -32,7 +32,7 @@ endfunction()
# ######### Common options ##########
-set(TVM_TIRX_VERSION "0.1.0a3")
+set(TVM_TIRX_VERSION "0.1.0a4")
if(PROJECT_IS_TOP_LEVEL)
tvm_tirx_option(TVM_TIRX_BUILD_TESTS BOOL OFF "Build C++ tests")
tvm_tirx_option(TVM_TIRX_BUILD_PYTHON_MODULE BOOL OFF "Build the Python
package with scikit-build-core")
diff --git a/ci/wheel/tvm-tirx-llvm-targets/pyproject.toml
b/ci/wheel/tvm-tirx-llvm-targets/pyproject.toml
index 6bd0f42c8..a53fbc4bb 100644
--- a/ci/wheel/tvm-tirx-llvm-targets/pyproject.toml
+++ b/ci/wheel/tvm-tirx-llvm-targets/pyproject.toml
@@ -16,11 +16,11 @@
# under the License.
[project]
name = "apache-tvm-tirx-llvm-targets"
-version = "0.1.0a3"
+version = "0.1.0a4"
description = "Additional LLVM code generation targets for TVM TIRx"
license = "Apache-2.0"
requires-python = ">=3.10"
-dependencies = ["apache-tvm-tirx==0.1.0a3"]
+dependencies = ["apache-tvm-tirx==0.1.0a4"]
[build-system]
requires = [
diff --git a/include/tvm/runtime/base.h b/include/tvm/runtime/base.h
index 3932c7a2a..17c0bbefa 100644
--- a/include/tvm/runtime/base.h
+++ b/include/tvm/runtime/base.h
@@ -32,7 +32,7 @@
// passes the setuptools_scm-resolved version through CMake). The literal
below is the
// fallback for a bare build with no override.
#ifndef TVM_TIRX_VERSION
-#define TVM_TIRX_VERSION "0.1.0a3"
+#define TVM_TIRX_VERSION "0.1.0a4"
#endif
// Core runtime visibility is independent of TIRx compiler visibility.
diff --git a/pyproject.toml b/pyproject.toml
index 893ebbee5..6ee2f77d2 100644
--- a/pyproject.toml
+++ b/pyproject.toml
@@ -17,7 +17,7 @@
[project]
name = "apache-tvm-tirx"
-version = "0.1.0a3"
+version = "0.1.0a4"
description = "TVM TIRx"
license = "Apache-2.0"
license-files = ["LICENSE"]
diff --git a/python/tvm_tirx/backend/cuda/target_tags.py
b/python/tvm_tirx/backend/cuda/target_tags.py
index 3f239c433..a91307124 100644
--- a/python/tvm_tirx/backend/cuda/target_tags.py
+++ b/python/tvm_tirx/backend/cuda/target_tags.py
@@ -33,8 +33,15 @@ def _register_cuda_tag(name, arch, shared_mem=49152,
regs=65536, **extra):
register_tag(name, config)
+def _register_if_host_enabled(name, config):
+ from tvm_tirx.codegen import llvm
+
+ if llvm.backend_enabled(config["host"]["mtriple"]):
+ register_tag(name, config)
+
+
def _register_jetson_tag(name, arch, mcpu, num_cores, regs=65536):
- register_tag(
+ _register_if_host_enabled(
name,
{
"kind": "cuda",
@@ -372,7 +379,7 @@ _register_jetson_tag("nvidia/jetson-agx-xavier", "sm_72",
"carmel", 8)
_register_jetson_tag("nvidia/jetson-orin-nano", "sm_87", "carmel", 6)
_register_jetson_tag("nvidia/jetson-agx-orin-32gb", "sm_87", "cortex-a78", 8)
_register_jetson_tag("nvidia/jetson-agx-orin-64gb", "sm_87", "cortex-a78", 12)
-register_tag(
+_register_if_host_enabled(
"nvidia/jetson-agx-thor",
{
"kind": "cuda",
diff --git a/python/tvm_tirx/backend/metal/target_tags.py
b/python/tvm_tirx/backend/metal/target_tags.py
index b1073c0e1..f0a5c5af7 100644
--- a/python/tvm_tirx/backend/metal/target_tags.py
+++ b/python/tvm_tirx/backend/metal/target_tags.py
@@ -22,13 +22,10 @@ _METAL_HOST_TRIPLE = "arm64-apple-macos"
def _register_metal_tag(name, max_threads, shared_mem, warp_size, mcpu):
- try:
- from tvm_tirx.codegen import llvm
+ from tvm_tirx.codegen import llvm
- if not llvm.is_valid_cpu(mcpu, _METAL_HOST_TRIPLE):
- return
- except Exception: # pylint: disable=broad-except
- pass # LLVM not available; register unconditionally
+ if not llvm.backend_enabled(_METAL_HOST_TRIPLE):
+ return
register_tag(
name,
{
diff --git a/python/tvm_tirx/codegen/llvm.py b/python/tvm_tirx/codegen/llvm.py
index 8734fea96..3d260d6aa 100644
--- a/python/tvm_tirx/codegen/llvm.py
+++ b/python/tvm_tirx/codegen/llvm.py
@@ -16,6 +16,8 @@
# under the License.
"""LLVM code generation and target information."""
+import functools
+
from tvm_ffi import Array, get_global_func
from tvm_tirx.target import Target
@@ -109,6 +111,39 @@ def get_targets():
return get_global_func("codegen.llvm_get_targets")()
[email protected]
+def _enabled_targets():
+ if get_global_func("codegen.llvm_get_targets", allow_missing=True) is None:
+ return None
+ return frozenset(get_targets())
+
+
+def backend_enabled(mtriple):
+ """Check whether this build's LLVM has the backend an Arm ``mtriple``
needs.
+
+ Non-Arm triples, and builds without LLVM, always pass.
+
+ Parameters
+ ----------
+ mtriple : str
+ The LLVM target triple, e.g. "aarch64-linux-gnu".
+
+ Returns
+ -------
+ enabled : bool
+ False only when ``mtriple`` needs an Arm backend that LLVM lacks.
+ """
+ targets = _enabled_targets()
+ if targets is None:
+ return True
+ arch = mtriple.split("-", 1)[0]
+ if arch.startswith(("aarch64", "arm64")):
+ return "aarch64" in targets
+ if arch.startswith(("arm", "thumb")):
+ return "arm" in targets
+ return True
+
+
def get_cpu_archlist(target=None):
"""Get CPU architectures for the target's `-mtriple`.
diff --git a/python/tvm_tirx/libinfo.py b/python/tvm_tirx/libinfo.py
index 95ce8bebd..e3a49ed2b 100644
--- a/python/tvm_tirx/libinfo.py
+++ b/python/tvm_tirx/libinfo.py
@@ -94,7 +94,7 @@ def find_include_path() -> str:
raise RuntimeError("Cannot find TVM include path.")
-__version__ = "0.1.0a3"
+__version__ = "0.1.0a4"
_LIBRARY_NAMES = ("tvm_tirx_compiler", "tvm_runtime")
diff --git a/python/tvm_tirx/target/tag_registry/arm_cpu.py
b/python/tvm_tirx/target/tag_registry/arm_cpu.py
index 2c719bb78..d8b894a42 100644
--- a/python/tvm_tirx/target/tag_registry/arm_cpu.py
+++ b/python/tvm_tirx/target/tag_registry/arm_cpu.py
@@ -18,8 +18,16 @@
from .registry import register_tag
+
+def _register_if_enabled(name, config):
+ from tvm_tirx.codegen import llvm
+
+ if llvm.backend_enabled(config["mtriple"]):
+ register_tag(name, config)
+
+
# ---------- Raspberry Pi (self-hosted, with host config) ----------
-register_tag(
+_register_if_enabled(
"raspberry-pi/4b-aarch64",
{
"kind": "llvm",
@@ -42,7 +50,7 @@ register_tag(
def _register_arm_tag(name, config):
base = {"kind": "llvm", "keys": ["arm_cpu", "cpu"], "device": "arm_cpu"}
base.update(config)
- register_tag(name, base)
+ _register_if_enabled(name, base)
_register_arm_tag(
diff --git a/tests/python/target/test_target.py
b/tests/python/target/test_target.py
index edef31300..5914caa7a 100644
--- a/tests/python/target/test_target.py
+++ b/tests/python/target/test_target.py
@@ -174,6 +174,10 @@ def test_target_tag_1():
def test_target_tag_jetson_agx_thor():
+ from tvm_tirx.codegen import llvm
+
+ if not llvm.backend_enabled("aarch64-linux-gnu"):
+ pytest.skip("need LLVM AArch64 backend")
tgt = tvm_tirx.target.Target("nvidia/jetson-agx-thor")
assert tgt.kind.name == "cuda"
assert tgt.attrs["arch"] == "sm_110a"
