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new ef3b9023a3e [DOCS] Add TIRx authoring layers diagram (#77)
ef3b9023a3e is described below
commit ef3b9023a3e5ccd1a8c9551dcc05b9c48d379389
Author: Shushi Hong <[email protected]>
AuthorDate: Wed Nov 4 19:33:14 2026 -0500
[DOCS] Add TIRx authoring layers diagram (#77)
Host the diagram referenced by apache/tvm-tirx#196 at
/images/docs/tirx/authoring_layers.svg.
---
images/docs/tirx/authoring_layers.svg | 96 +++++++++++++++++++++++++++++++++++
1 file changed, 96 insertions(+)
diff --git a/images/docs/tirx/authoring_layers.svg
b/images/docs/tirx/authoring_layers.svg
new file mode 100644
index 00000000000..68eec9af357
--- /dev/null
+++ b/images/docs/tirx/authoring_layers.svg
@@ -0,0 +1,96 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--
+ Licensed to the Apache Software Foundation (ASF) under one
+ or more contributor license agreements. See the NOTICE file
+ distributed with this work for additional information
+ regarding copyright ownership. The ASF licenses this file
+ to you under the Apache License, Version 2.0 (the
+ "License"); you may not use this file except in compliance
+ with the License. You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing,
+ software distributed under the License is distributed on an
+ "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
+ KIND, either express or implied. See the License for the
+ specific language governing permissions and limitations
+ under the License.
+-->
+<svg xmlns="http://www.w3.org/2000/svg" width="1280" height="660"
+ viewBox="0 60 1280 660" role="img" aria-labelledby="title description">
+ <title id="title">Core language, tile expansion, and direct backend calls in
TIRx</title>
+ <desc id="description">
+ One TIRx program combines core language constructs with tile operations
+ and direct backend calls. The core language spans all abstraction levels:
+ loops, branches, scalar expressions, and tensor accesses are used
throughout.
+ The optional CUDA tile layer provides apply, which repeats an explicit PTX
+ instruction, and ewise, which inlines a scalar function at each element.
+ TileDispatch expands tile calls into core statements and expressions and,
+ for instruction patterns, backend calls. Direct backend and PTX calls are
+ shown as a thin interface. All constructs share the same TIRx IR, which
+ undergoes layout and further lowering before code generation.
+ </desc>
+ <defs>
+ <marker id="arrow" markerWidth="10" markerHeight="10" refX="8" refY="5"
+ orient="auto" markerUnits="userSpaceOnUse">
+ <path d="M 0 0 L 9 5 L 0 10 Z" fill="#637181"/>
+ </marker>
+ <style>
+ text { font-family: Arial, Helvetica, sans-serif; fill: #17212d; }
+ .heading { font-size: 32px; font-weight: 700; }
+ .label { font-size: 27px; font-weight: 600; }
+ .detail { font-size: 24px; }
+ .note { font-size: 22px; fill: #4c6075; }
+ .code { font-family: 'DejaVu Sans Mono', monospace; font-size: 25px; }
+ .flow { fill: none; stroke: #637181; stroke-width: 3;
+ stroke-linecap: round; stroke-linejoin: round; }
+ </style>
+ </defs>
+
+ <rect width="1280" height="720" fill="#ffffff"/>
+
+ <rect x="32" y="84" width="1216" height="464" rx="20"
+ fill="#f7f9fd" stroke="#315e88" stroke-width="2.6"/>
+ <text x="640" y="128" text-anchor="middle" class="label">One TIRx
program</text>
+
+ <!-- Core syntax is shared across levels. See src/script/ir_builder/ir.cc.
-->
+ <rect x="64" y="164" width="340" height="314" rx="14"
+ fill="#e3ecf9" stroke="#6488cb" stroke-width="2.2"/>
+ <text x="234" y="208" text-anchor="middle" class="label">Core language</text>
+ <text x="234" y="247" text-anchor="middle" class="code">T.*</text>
+ <text x="234" y="299" text-anchor="middle" class="detail">Loops and
branches</text>
+ <text x="234" y="338" text-anchor="middle" class="detail">Scalar
expressions</text>
+ <text x="234" y="377" text-anchor="middle" class="detail">Tensor
accesses</text>
+ <text x="234" y="447" text-anchor="middle" class="note">Used throughout the
program</text>
+
+ <!-- Only the optional tile expansion sits above direct native operations.
-->
+ <rect x="464" y="164" width="752" height="176" rx="14"
+ fill="#d6e3f7" stroke="#6488cb" stroke-width="2.2"/>
+ <text x="840" y="205" text-anchor="middle" class="label">Tile
operations</text>
+ <text x="652" y="247" text-anchor="middle"
class="code">T.cuda.tile.apply</text>
+ <text x="1028" y="247" text-anchor="middle"
class="code">T.cuda.tile.ewise</text>
+ <text x="652" y="280" text-anchor="middle" class="note">Repeat a chosen PTX
instruction</text>
+ <text x="1028" y="280" text-anchor="middle" class="note">Inline a scalar
function</text>
+ <text x="840" y="317" text-anchor="middle" class="note">Tensor layouts and
execution scope</text>
+
+ <!-- Expansion is implemented in backend/cuda/tile/patterns:
+ register.py emits PTX calls; ewise.py emits scalar TensorStores;
+ common.py wraps these in ordinary IR For loops. -->
+ <path d="M 840 340 V 376 H 407" class="flow" marker-end="url(#arrow)"/>
+ <path d="M 840 376 V 411" class="flow" marker-end="url(#arrow)"/>
+ <circle cx="840" cy="376" r="4" fill="#637181"/>
+ <text x="865" y="384" class="code">TileDispatch</text>
+
+ <rect x="464" y="414" width="752" height="64" rx="12"
+ fill="#edf3fa" stroke="#768393" stroke-width="2.2"/>
+ <text x="488" y="454" class="label">Direct backend calls</text>
+ <text x="918" y="454" text-anchor="middle" class="code">T.cuda.* /
T.ptx.*</text>
+
+ <text x="640" y="521" text-anchor="middle" class="detail">Shared TIRx IR:
statements, expressions and calls</text>
+
+ <path d="M 640 548 V 633" class="flow" marker-end="url(#arrow)"/>
+ <text x="664" y="598" class="note">Layout and further lowering</text>
+ <rect x="440" y="636" width="400" height="60" fill="#c2d9b0"/>
+ <text x="640" y="677" text-anchor="middle" class="heading">Code
generation</text>
+</svg>