tmoreau89 commented on pull request #9:
URL: https://github.com/apache/incubator-tvm-vta/pull/9#issuecomment-663776880


   thanks @remotego @liangfu @pasqoc for the insightful comments. I think that 
all opinions expressed are very valid!
   
   So far our approach to naming VTA target has been to couple the VTA target 
with the FPGA board (e.g. pynq, ultra96, de10nano). These targets also contrast 
with functional simulation (sim), and cycle accurate sim (tsim).
   
   We've been using the VTA target to guide the compilation process to the 
target device, given that some of the drivers had to be written in a board 
specific fashion. In the case of the Intel OpenCL FPGA support, I understand 
that this work captures a variety of hardware backends, including Arria 10, 
Stratix10 boards etc, and that the driver codebase would remain mostly 
identical between those boards (unlike Pynq, and Ultra96 that relied on very 
different ARM SoCs)
   
   However to find a quick resolution to this discussion we can either choose
   - to use a specific board name (rather than FPGA family) to indicate that 
the OCL FPGA design has been tested on this device. This echo @liangfu's 
concern that we should have concrete targets for the community to reproduce 
work on.
   - keep the naming open as @remotego and @pasqoc are advocating, and classify 
this target as intelfocl_pcie to indicate that this applies only to PCIE-based 
OpenCL Intel FPGA devices. 
   
   @remotego let us know what you think


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