FrozenGene commented on a change in pull request #6117:
URL: https://github.com/apache/incubator-tvm/pull/6117#discussion_r477065824



##########
File path: python/tvm/topi/arm_cpu/tensor_intrin.py
##########
@@ -21,7 +21,186 @@
 from tvm import te
 from tvm.contrib import util, clang
 
-def gemv_quantized_impl(M, N, data_type='uint8'):
+def gemm_quantized_4_4_batched():
+    return """
+           // First half
+           // Higher part of a0 * {b0,b1,b2,b3}
+           "umull v8.8h, v0.8b, v4.8b\\n"
+           "umull v9.8h, v0.8b, v5.8b\\n"
+           "umull v10.8h, v0.8b, v6.8b\\n"
+           "umull v11.8h, v0.8b, v7.8b\\n"
+
+           // Higher part of a1 * {b0,b1,b2,b3}
+           "umull v12.8h, v1.8b, v4.8b\\n"
+           "umull v13.8h, v1.8b, v5.8b\\n"
+           "umull v14.8h, v1.8b, v6.8b\\n"
+           "umull v15.8h, v1.8b, v7.8b\\n"
+
+           // Accumulate
+           "uadalp v16.4s, v8.8h\\n"
+           "uadalp v17.4s, v9.8h\\n"
+           "uadalp v18.4s, v10.8h\\n"
+           "uadalp v19.4s, v11.8h\\n"
+           "uadalp v20.4s, v12.8h\\n"
+           "uadalp v21.4s, v13.8h\\n"
+           "uadalp v22.4s, v14.8h\\n"
+           "uadalp v23.4s, v15.8h\\n"
+
+           // Lower part of a0 * {b0,b1,b2,b3}
+           "umull2 v8.8h, v0.16b, v4.16b\\n"
+           "umull2 v9.8h, v0.16b, v5.16b\\n"
+           "umull2 v10.8h, v0.16b, v6.16b\\n"
+           "umull2 v11.8h, v0.16b, v7.16b\\n"
+
+           // Lower part of a1 * {b0,b1,b2,b3}
+           "umull2 v12.8h, v1.16b, v4.16b\\n"
+           "umull2 v13.8h, v1.16b, v5.16b\\n"
+           "umull2 v14.8h, v1.16b, v6.16b\\n"
+           "umull2 v15.8h, v1.16b, v7.16b\\n"
+
+            // Accumulate again
+           "uadalp v16.4s, v8.8h\\n"
+           "uadalp v17.4s, v9.8h\\n"
+           "uadalp v18.4s, v10.8h\\n"
+           "uadalp v19.4s, v11.8h\\n"
+           "uadalp v20.4s, v12.8h\\n"
+           "uadalp v21.4s, v13.8h\\n"
+           "uadalp v22.4s, v14.8h\\n"
+           "uadalp v23.4s, v15.8h\\n"
+
+           // Second half
+           // Lower part of a2 * {b0,b1,b2,b3}
+           "umull v8.8h, v2.8b, v4.8b\\n"
+           "umull v9.8h, v2.8b, v5.8b\\n"
+           "umull v10.8h, v2.8b, v6.8b\\n"
+           "umull v11.8h, v2.8b, v7.8b\\n"
+
+           // Lower part of a3 * {b0,b1,b2,b3}
+           "umull v12.8h, v3.8b, v4.8b\\n"
+           "umull v13.8h, v3.8b, v5.8b\\n"
+           "umull v14.8h, v3.8b, v6.8b\\n"
+           "umull v15.8h, v3.8b, v7.8b\\n"
+
+           // Accumulate
+           "uadalp v24.4s, v8.8h\\n"
+           "uadalp v25.4s, v9.8h\\n"
+           "uadalp v26.4s, v10.8h\\n"
+           "uadalp v27.4s, v11.8h\\n"
+           "uadalp v28.4s, v12.8h\\n"
+           "uadalp v29.4s, v13.8h\\n"
+           "uadalp v30.4s, v14.8h\\n"
+           "uadalp v31.4s, v15.8h\\n"
+
+           // Higher part of a2 * {b0,b1,b2,b3}
+           "umull2 v8.8h, v2.16b, v4.16b\\n"
+           "umull2 v9.8h, v2.16b, v5.16b\\n"
+           "umull2 v10.8h, v2.16b, v6.16b\\n"
+           "umull2 v11.8h, v2.16b, v7.16b\\n"
+
+           // Higher part of a3 * {b0,b1,b2,b3}
+           "umull2 v12.8h, v3.16b, v4.16b\\n"
+           "umull2 v13.8h, v3.16b, v5.16b\\n"
+           "umull2 v14.8h, v3.16b, v6.16b\\n"
+           "umull2 v15.8h, v3.16b, v7.16b\\n"
+
+           // Accumulate again
+           "uadalp v24.4s, v8.8h\\n"
+           "uadalp v25.4s, v9.8h\\n"
+           "uadalp v26.4s, v10.8h\\n"
+           "uadalp v27.4s, v11.8h\\n"
+           "uadalp v28.4s, v12.8h\\n"
+           "uadalp v29.4s, v13.8h\\n"
+           "uadalp v30.4s, v14.8h\\n"
+           "uadalp v31.4s, v15.8h\\n"
+    """
+
+def gemm_quantized_4_4_interleaved():

Review comment:
       Ignore. I find it out and this is guarded in the `is_aarch64_arm`




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