alexgl-github commented on a change in pull request #6840:
URL: https://github.com/apache/incubator-tvm/pull/6840#discussion_r517582147
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File path: python/tvm/topi/cuda/conv1d_transpose_ncw.py
##########
@@ -65,36 +66,43 @@ def conv1d_transpose_ncw(cfg, data, kernel, stride,
padding, out_dtype, output_p
out_width = (inp_width - 1) * stride + kernel_size - pad_left - pad_right
+ output_padding
pad_left = kernel_size - 1 - pad_left
pad_right = kernel_size - 1 - pad_right + output_padding
+ padded_width = pad_left + inp_width + pad_right
dilated_width = stride * (inp_width - 1) + 1
- data = te.compute(
- (batch, inp_channels, pad_left + dilated_width + pad_right),
+ padded_dilated_width = pad_left + dilated_width + pad_right
+
+ padded_data = te.compute(
+ (batch, inp_channels, padded_width),
lambda n, c, x: tvm.tir.if_then_else(
- tvm.tir.all(
- x >= pad_left,
- x < pad_left + dilated_width,
- tvm.tir.indexmod(x - pad_left, stride).equal(0),
- ),
- data[n, c, tvm.tir.indexdiv(x - pad_left, stride)],
- tvm.tir.const(0.0, "float32"),
- ),
- name="data_pad",
- )
-
- dc = te.reduce_axis((0, inp_channels), name="dc")
- dw = te.reduce_axis((0, kernel_size), name="dw")
+ tvm.tir.all(x >= pad_left,
+ x < pad_left + inp_width),
+ data[n, c, x - pad_left],
+ tvm.tir.const(0., "float32")),
+ name='data_pad')
+
+ padded_kernel = te.compute(
+ (inp_channels, out_channels, kernel_size + stride - 1),
+ lambda ci, co, k: tvm.tir.if_then_else(
+ tvm.tir.all(k < kernel_size),
+ kernel[ci, co, kernel_size-k-1],
+ tvm.tir.const(0., "float32")),
+ name='kernel_pad')
+
+ ci = te.reduce_axis((0, inp_channels), name='ci')
+ k = te.reduce_axis((0, (kernel_size + stride - 1)//stride), name='k')
Review comment:
I don't think ceil of floating point division can be used in
reduce_axis. There.s no integer equivalent in tir.op, i've replaced it with
tir.indexdiv(...)
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