FrozenGene commented on a change in pull request #7635:
URL: https://github.com/apache/tvm/pull/7635#discussion_r593093746
##########
File path: python/tvm/relay/op/strategy/arm_cpu.py
##########
@@ -198,7 +231,9 @@ def conv2d_strategy_arm_cpu(attrs, inputs, out_type,
target):
elif layout == "NHWC":
assert kernel_layout == "HWOI"
strategy.add_implementation(
-
wrap_compute_conv2d(topi.arm_cpu.compute_depthwise_conv2d_nhwc),
+ wrap_compute_conv2d(
+ topi.arm_cpu.compute_depthwise_conv2d_nhwc,
need_auto_scheduler_layout=True
Review comment:
1. I think we don't have official support for depthwise convolution for
layout rewrite.
2. I prefer using `auto_scheduler_enabled` to distinguish and just call
`topi.nn.depthwise`:
```python
elif layout == "NHWC":
assert kernel_layout == "HWOI"
from tvm.auto_scheduler import is_auto_scheduler_enabled
if is_auto_scheduler_enabled():
strategy.add_implementation(
wrap_compute_conv2d(topi.nn.depthwise_conv2d_nhwc),
naive_schedule,
name="depthwise_conv2d_nhwc.arm_cpu",
)
else:
strategy.add_implementation(
wrap_compute_conv2d(topi.arm_cpu.compute_depthwise_conv2d_nhwc),
wrap_topi_schedule(topi.arm_cpu.schedule_depthwise_conv2d_nhwc),
name="depthwise_conv2d_nhwc.arm_cpu",
)
```
##########
File path: python/tvm/relay/op/strategy/x86.py
##########
@@ -196,7 +196,7 @@ def conv2d_strategy_cpu(attrs, inputs, out_type, target):
"depthwise_conv2d NHWC layout is not optimized for x86
with autotvm."
)
strategy.add_implementation(
- wrap_compute_conv2d(topi.nn.depthwise_conv2d_nhwc),
+ wrap_compute_conv2d(topi.nn.depthwise_conv2d_nhwc,
need_auto_scheduler_layout=True),
Review comment:
ditto
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