junrushao1994 opened a new pull request #8114: URL: https://github.com/apache/tvm/pull/8114
This PR is part of the TensorIR upstreaming effort (#7527), stage M2a. In this PR, we implemented cached flag verification, which will check the correctness of the following flags if the schedule class is set to debug: - is_affine_binding - region_cover - is_stage_pipeline To enable the detection of the region cover property, we also bring in several integer set analysis along with this PR. -- This is an automated message from the Apache Git Service. To respond to the message, please log on to GitHub and use the URL above to go to the specific comment. For queries about this service, please contact Infrastructure at: us...@infra.apache.org
