tqchen edited a comment on pull request #18:
URL: https://github.com/apache/tvm-rfcs/pull/18#issuecomment-893549153


   Thanks @MeeraN7 for the RFC. SVE is certainly an interesting topic.
   
   Because we do not yet have SVE support in TIR. It would be useful to think 
carefully about how SVE can be presented and transformed.  Right now the 
proposal contains one way to do so. However, we could use a bit of more context 
information, to see how the proposed design impacts the general lowering flow.
   
   Specifically, it would be very helpful to also show examples of the code 
along the transformations, so we can have a better understanding the possible 
design tradeoffs.
   
   Specifically:
   
   - The TIR before SVE vectorization
   - The TIR after SVE vectorization right before LLVM codegen
   - The corresponding lowered llvm intrinsics
   
   


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