Alex-grovety commented on issue #8717:
URL: https://github.com/apache/tvm/issues/8717#issuecomment-980318038
As I understood in tvm/python/tvm/relay/qnn/op/legalizations.py will be such
changes:
for dense
```
def is_simd_on_arm():
"""Checks whether the hardware has a SIMD (single instruction, multiple
data) type of parallel processing."""
target = tvm.target.Target.current(allow_none=False)
return "+neon" in target.mattr
@qnn_dense_legalize.register("arm_cpu")
def _qnn_dense_legalize_arm_cpu(attrs, inputs, types):
# Advanced SIMD present and no dot product extension
if (is_aarch64_arm() or is_simd_on_arm()) and not is_fast_int8_on_arm():
return helper_no_fast_int8_hw_legalization(attrs, inputs, types,
relay.nn.dense)
return helper_change_dtypes_to_be_same(attrs, inputs, types,
relay.qnn.op.dense)
```
and for convolution
```
@qnn_conv2d_legalize.register("arm_cpu")
def _qnn_conv2d_legalize_arm_cpu(attrs, inputs, types):
# ARM prefers the dtypes to be same.
is_depthwise = relay.op.strategy.is_depthwise_conv2d(
types[0].shape,
attrs["data_layout"],
types[1].shape,
attrs["kernel_layout"],
attrs["groups"],
)
# Use int8 for Cortex-M7
use_int8_on_arm = (not is_depthwise) and is_aarch64_arm() and
attrs["data_layout"] == "NHWC" or not is_aarch64_arm() and not is_simd_on_arm()
if use_int8_on_arm or is_fast_int8_on_arm():
return helper_change_dtypes_to_be_same(attrs, inputs, types,
relay.qnn.op.conv2d)
return helper_no_fast_int8_hw_legalization(attrs, inputs, types,
relay.nn.conv2d)
```
@Mousius, is it right?
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