masahi commented on pull request #10562: URL: https://github.com/apache/tvm/pull/10562#issuecomment-1064391425
hmm, can TensorIR `Block` be used to "hide" those implementation details while still allowing TIR-native implementation of binary search ops? If not and if we have to resort to backend-specific hard-coding like this, this sounds like a major step backward to me. Note that it is not just CUDA and LLVM, there is opencl, metal, spirv... -- This is an automated message from the Apache Git Service. To respond to the message, please log on to GitHub and use the URL above to go to the specific comment. To unsubscribe, e-mail: [email protected] For queries about this service, please contact Infrastructure at: [email protected]
