satml opened a new issue #61: URL: https://github.com/apache/tvm-rfcs/issues/61
I am trying to generate Verilog RTL from trained DNN models ( either pytorch or tensorflow ). Is that possible usig TVM flow ? if yes and if any of you have done similar work, can you please point me to documentation or examples ? -- This is an automated message from the Apache Git Service. To respond to the message, please log on to GitHub and use the URL above to go to the specific comment. To unsubscribe, e-mail: [email protected] For queries about this service, please contact Infrastructure at: [email protected]
