wrongtest commented on code in PR #11217:
URL: https://github.com/apache/tvm/pull/11217#discussion_r872309857
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src/relay/backend/te_compiler_cache.cc:
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@@ -358,9 +358,18 @@ class ScheduleBuilder : public ExprVisitor {
// Use TOPI schedule if user specificed, or the function has no
auto_scheduler schedule.
if (!schedule.defined() && !prim_func.defined()) {
- auto anchor_impl =
lower_te_compute.op_implementations_.find(anchor_op_.operator->());
- ICHECK(anchor_impl != lower_te_compute.op_implementations_.end());
- schedule = anchor_impl->second.Schedule(anchor_attrs_, tensor_outs,
target_);
+ if (anchor_op_.defined()) {
+ auto anchor_impl =
lower_te_compute.op_implementations_.find(anchor_op_.operator->());
+ ICHECK(anchor_impl != lower_te_compute.op_implementations_.end());
+ schedule = anchor_impl->second.Schedule(anchor_attrs_, tensor_outs,
target_);
+ } else {
+ Array<te::Operation> op_outs;
+ for (size_t i = 0; i < outputs.size(); ++i) {
+ outputs.Set(i, topi::identity(outputs[i]));
+ op_outs.push_back(outputs[i]->op);
+ }
+ schedule = te::create_schedule(op_outs);
Review Comment:
> This doesn't seem to work if the target is gpu.
Change to use `injective_schedule` GenericFunc here.
In line 327-330, It seems do not help now when output tensor is same as
input tensor (placeholder) actually, TIR lowering fail on aliased param
buffers. So I change to copy inputs with identity op, it would be a performance
regression on such corner cases.
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