csullivan commented on code in PR #12667:
URL: https://github.com/apache/tvm/pull/12667#discussion_r961843767
##########
python/tvm/contrib/hexagon/session.py:
##########
@@ -58,7 +58,7 @@ def __init__(
remote_kw: dict,
session_name: str = "hexagon-rpc",
remote_stack_size_bytes: int = 256 * 1024, # Min size for main thread
in QuRT/sim
- rpc_receive_buffer_size_bytes: int = 5 * 1024 * 1024, # Size for
passing hexagon tests
+ rpc_receive_buffer_size_bytes: int = 1024 * 1024 * 1024, # Size for
passing hexagon tests
Review Comment:
Left over from testing? A gigabyte for the rpc buffer can impact available
memory for model execution
##########
tests/python/contrib/test_hexagon/test_vtcm_bandwidth.py:
##########
@@ -0,0 +1,169 @@
+# Licensed to the Apache Software Foundation (ASF) under one
+# or more contributor license agreements. See the NOTICE file
+# distributed with this work for additional information
+# regarding copyright ownership. The ASF licenses this file
+# to you under the Apache License, Version 2.0 (the
+# "License"); you may not use this file except in compliance
+# with the License. You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing,
+# software distributed under the License is distributed on an
+# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
+# KIND, either express or implied. See the License for the
+# specific language governing permissions and limitations
+# under the License.
+
+"""Test theoretical bandwith for data transfers to VTCM for different
strategies."""
+
+import numpy as np
+from tests.python.contrib.test_hexagon.infrastructure import
allocate_hexagon_array
+import tvm
+
+from tvm.script import tir as T
+from numpy.random import default_rng
+
+MB = 1024**2
+KB = 1024
+TEST_OUTPUT_TEMPLATE = "Test bandwidth with buffer size {}MB... \n -Base:
{} GBps \n -Vectorized: {} GBps\n -Vectorized and Parallelized: {} GBps\n
-Single DMA Copy: {} GBps\n"
+
+
+def memcopy_operator(size):
+ @T.prim_func
+ def operator(a: T.handle, a_v: T.handle) -> None:
+ A = T.match_buffer(a, size, dtype="int8", align=128, scope="global")
+ A_global_vtcm = T.match_buffer(a_v, size, dtype="int8", align=128,
scope="global.vtcm")
+ for ax0 in T.serial(size):
+ with T.block("A_global.vtcm"):
+ v0 = T.axis.spatial(size, ax0)
+ T.reads(A[v0])
+ T.writes(A_global_vtcm[v0])
+ A_global_vtcm[v0] = A[v0]
+
+ return operator
+
+
+def single_dma_operator(size):
+ @T.prim_func
+ def operator(a: T.handle, a_v: T.handle) -> None:
+ A = T.match_buffer(a, size, dtype="int8", align=128, scope="global")
+ A_global_vtcm = T.match_buffer(a_v, size, dtype="int8", align=128,
scope="global.vtcm")
Review Comment:
A nice follow up would to support measuring the bandwidth in both directions
(ddr->vtcm and vtcm->ddr) given that in tests we saw a significant perf
asymmetry and making that easily reproducible can help the QC experts debug or
provide us insights.
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