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from cf2a8ea426 [Hexagon] Update tests to use AOT Executor (#13221)
add 187a2570ed [TIR][Schedule] Add cache_index to precompute index of
buffer load (#13192)
add 3cce9738bd [BugFix][TIR] Affine-binding check should not simplify
trivial iterators (#13203)
No new revisions were added by this update.
Summary of changes:
include/tvm/arith/int_set.h | 9 +
include/tvm/tir/schedule/schedule.h | 8 +
python/tvm/tir/schedule/schedule.py | 86 ++++
src/tir/schedule/analysis/analysis.cc | 3 +-
src/tir/schedule/concrete_schedule.cc | 13 +
src/tir/schedule/concrete_schedule.h | 1 +
src/tir/schedule/primitive.h | 9 +
src/tir/schedule/primitive/cache_index.cc | 484 +++++++++++++++++++++
src/tir/schedule/schedule.cc | 2 +
src/tir/schedule/traced_schedule.cc | 14 +
src/tir/schedule/traced_schedule.h | 1 +
.../unittest/test_tir_schedule_cache_index.py | 78 ++++
.../test_tir_schedule_state_cached_flags.py | 30 ++
...t_tir_transform_lower_cross_thread_reduction.py | 54 +--
14 files changed, 765 insertions(+), 27 deletions(-)
create mode 100644 src/tir/schedule/primitive/cache_index.cc
create mode 100644 tests/python/unittest/test_tir_schedule_cache_index.py
