multiverstack-intellif commented on code in PR #13700:
URL: https://github.com/apache/tvm/pull/13700#discussion_r1068927587
##########
python/tvm/tir/schedule/schedule.py:
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@@ -1289,7 +1289,10 @@ def cache_inplace(data_io: T.Buffer[64, "int32"]) ->
None:
@type_checked
def cache_index(
- self, block: Union[BlockRV, str], buffer_index: Union[int, str, Buffer]
+ self,
+ block: Union[BlockRV, str],
+ storage_scope: str,
+ cse_thresh: int,
Review Comment:
> Can we set a default value for `cse_thresh`? e.g. 0/-1 for not enabling
cse?
OK, I'll set 0 as caching all the index computation for the target block,
should be useful for simple cases and expensive in complex cases.
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