This is an automated email from the ASF dual-hosted git repository.

github-bot pushed a change to branch nightly
in repository https://gitbox.apache.org/repos/asf/tvm.git


    from befdc4e631 [Fix][TIR] LowerCrossThreadReduction with write-back 
predicate (#14199)
     add a15ade30b1 [TVMC] Add option to dump TIR code to file (#14186)
     add 424c749a3d [MetaSchedule] Tile and pack intermediate output for CUDA 
TensorCore (#14108)
     add e1c2ad18e9 [TVMScript] Distinguish LetStmt and Let expression (#14207)
     add 9b9124721c [Frontend][PaddlePaddle] Fix bug in tests for upgrading 
paddlepaddle to 2.4.2 (#14206)
     add 012d6a72f6 [IR] Platform-independent SHash (#14204)
     add 2f2d5d439a [MetaSchedule] preseve global_symbol attached to function 
after applying MS (#14219)

No new revisions were added by this update.

Summary of changes:
 docker/install/ubuntu_install_paddle.sh            |   2 +-
 include/tvm/node/reflection.h                      |   2 +-
 include/tvm/node/structural_hash.h                 |  74 +-
 include/tvm/runtime/container/string.h             |  73 +-
 include/tvm/script/ir_builder/tir/ir.h             |   8 +-
 python/tvm/driver/tvmc/compiler.py                 |  54 +-
 .../tvm/meta_schedule/testing/space_generation.py  |   2 +-
 python/tvm/meta_schedule/tune_context.py           |   3 +-
 python/tvm/script/ir_builder/tir/frame.py          |   4 +-
 python/tvm/script/ir_builder/tir/ir.py             |  60 +-
 python/tvm/script/parser/tir/parser.py             |   7 +-
 src/meta_schedule/postproc/verify_gpu_code.cc      |   1 +
 .../schedule_rule/multi_level_tiling.cc            |  13 +-
 .../schedule_rule/multi_level_tiling.h             |   8 +-
 .../multi_level_tiling_tensor_core.cc              | 176 ++++-
 .../multi_level_tiling_wide_vector.cc              |  15 +-
 src/node/structural_hash.cc                        |  82 +--
 src/relay/backend/utils.h                          |   2 +-
 src/script/ir_builder/tir/ir.cc                    |  18 +-
 src/script/printer/tir/expr.cc                     |   9 +-
 src/script/printer/tir/stmt.cc                     |  45 +-
 src/tir/analysis/block_access_region_detector.cc   |   9 +-
 src/tir/schedule/ir_comparator.cc                  |  10 +-
 src/tir/schedule/ir_comparator.h                   |   7 +-
 tests/python/driver/tvmc/test_compiler.py          |  25 +-
 tests/python/frontend/paddlepaddle/test_forward.py |   5 +-
 tests/python/relay/aot/test_pass_aot_lower_main.py |   2 +-
 .../test_meta_schedule_schedule_rule_mlt_tc.py     | 783 +++++++++------------
 .../test_tir_transform_common_subexpr_elim.py      |   7 +-
 .../test_tir_transform_hoist_expression.py         |   9 +-
 .../test_tir_transform_inject_software_pipeline.py |  16 +-
 ...ransform_convert_pool_allocations_to_offsets.py |  26 +-
 .../unittest/test_tvmscript_ir_builder_tir.py      |   2 +-
 .../python/unittest/test_tvmscript_printer_tir.py  |   8 +-
 tests/python/unittest/test_tvmscript_roundtrip.py  |  21 +-
 35 files changed, 935 insertions(+), 653 deletions(-)

Reply via email to