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from 2ff41c6156 [TIR][Schedule] Allow buffer name argument to
Schedule.set_scope (#14327)
add a5ed21d12a [CODEGEN][METAL] Fix ramp codegen (#14330)
add 542274dde9 [Schedule] Add an optional argument `disable_checks` for
`Schedule` (#14281)
add 56d0e3b7af [METAL][CODEGEN] testcase for ramp codegen (#14331)
add fc2a9e50af [CODEGEN][METAL] Fix unaligned vector load (#14332)
No new revisions were added by this update.
Summary of changes:
include/tvm/tir/schedule/schedule.h | 13 ++++--
include/tvm/tir/schedule/state.h | 9 +++-
python/tvm/tir/schedule/schedule.py | 21 +++++++++
python/tvm/tir/schedule/state.py | 14 ++++++
src/target/source/codegen_c.cc | 15 +++---
src/target/source/codegen_metal.cc | 6 ++-
src/target/source/codegen_metal.h | 3 +-
src/target/source/codegen_opencl.cc | 37 +++++++++++++++
src/target/source/codegen_opencl.h | 3 ++
src/tir/schedule/analysis/analysis.cc | 2 +-
src/tir/schedule/concrete_schedule.cc | 6 ++-
src/tir/schedule/primitive/for_kind.cc | 4 +-
src/tir/schedule/primitive/reduction.cc | 30 +++++++-----
src/tir/schedule/schedule.cc | 10 ++--
src/tir/schedule/state.cc | 23 ++++++---
src/tir/schedule/traced_schedule.cc | 5 +-
tests/python/unittest/test_target_codegen_metal.py | 54 +++++++++++++++++++++-
17 files changed, 210 insertions(+), 45 deletions(-)
