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ruihangl pushed a change to branch main
in repository https://gitbox.apache.org/repos/asf/tvm.git
from e5ae4347dd [CUDA][Schedule] Better Layout Transform Schedules (#14167)
add b987556375 [TIR] Remove LoadNode and StoreNode (#14381)
No new revisions were added by this update.
Summary of changes:
include/tvm/tir/expr.h | 60 -------------------
include/tvm/tir/expr_functor.h | 4 --
include/tvm/tir/stmt.h | 66 ---------------------
include/tvm/tir/stmt_functor.h | 4 --
python/tvm/ir/json_compact.py | 2 -
.../tvm/relay/backend/contrib/ethosu/tir/passes.py | 2 +-
.../backend/contrib/ethosu/tir_to_cs_translator.py | 1 -
python/tvm/script/ir_builder/tir/ir.py | 2 -
python/tvm/tir/__init__.py | 3 +-
python/tvm/tir/analysis/analysis.py | 3 +-
python/tvm/tir/expr.py | 30 ----------
python/tvm/tir/stmt.py | 38 ++----------
src/contrib/hybrid/codegen_hybrid.cc | 6 --
src/contrib/hybrid/codegen_hybrid.h | 2 -
src/relay/printer/text_printer.h | 2 -
src/relay/printer/tir_text_printer.cc | 19 ------
src/relay/printer/tvmscript_printer.cc | 26 ---------
src/script/printer/legacy_repr.cc | 27 ---------
src/script/printer/tir/expr.cc | 6 --
src/script/printer/tir/stmt.cc | 7 ---
src/target/llvm/codegen_llvm.cc | 8 ---
src/target/llvm/codegen_llvm.h | 2 -
src/target/source/codegen_c.cc | 8 ---
src/target/source/codegen_c.h | 2 -
src/target/source/codegen_opencl.cc | 4 --
src/target/source/codegen_opencl.h | 1 -
src/target/stackvm/codegen_stackvm.cc | 8 ---
src/target/stackvm/codegen_stackvm.h | 2 -
src/te/autodiff/jacobian.cc | 1 -
src/tir/analysis/block_access_region_detector.cc | 10 ----
src/tir/analysis/buffer_access_lca_detector.cc | 9 ---
src/tir/analysis/device_constraint_utils.cc | 18 ------
src/tir/analysis/side_effect.cc | 5 --
src/tir/analysis/var_touch.cc | 8 ---
src/tir/analysis/var_use_def_analysis.cc | 8 ---
src/tir/analysis/var_use_def_analysis.h | 4 --
src/tir/analysis/verify_gpu_code.cc | 8 ---
src/tir/analysis/verify_memory.cc | 8 ---
src/tir/ir/expr.cc | 67 ----------------------
src/tir/ir/expr_functor.cc | 8 ---
src/tir/ir/stmt.cc | 53 -----------------
src/tir/ir/stmt_functor.cc | 16 ------
src/tir/schedule/analysis/reducer.cc | 18 ------
src/tir/schedule/primitive/cache_index.cc | 4 --
src/tir/schedule/primitive/cache_read_write.cc | 12 ----
src/tir/schedule/primitive/compute_inline.cc | 8 ---
src/tir/transforms/bf16_legalize.cc | 8 ---
src/tir/transforms/bound_checker.cc | 8 ---
src/tir/transforms/common_subexpr_elim.cc | 5 +-
src/tir/transforms/compact_buffer_region.cc | 8 ---
src/tir/transforms/coproc_sync.cc | 6 --
src/tir/transforms/inject_copy_intrin.cc | 2 +-
src/tir/transforms/inject_double_buffer.cc | 8 ---
src/tir/transforms/inject_virtual_thread.cc | 15 -----
src/tir/transforms/install_debug_spans.h | 1 -
src/tir/transforms/ir_utils.cc | 8 ---
src/tir/transforms/lower_custom_datatypes.cc | 8 ---
src/tir/transforms/lower_match_buffer.cc | 14 -----
src/tir/transforms/lower_thread_allreduce.cc | 8 ---
src/tir/transforms/lower_warp_memory.cc | 12 ----
.../merge_dynamic_shared_memory_allocations.cc | 16 ------
src/tir/transforms/narrow_datatype.cc | 10 +---
src/tir/transforms/renew_defs.cc | 8 ---
src/tir/transforms/rewrite_unsafe_select.cc | 3 -
src/tir/transforms/simplify.cc | 4 --
src/tir/transforms/storage_access.cc | 8 ---
src/tir/transforms/storage_access.h | 2 -
src/tir/transforms/storage_flatten.cc | 16 ------
src/tir/transforms/storage_rewrite.cc | 42 --------------
src/tir/transforms/thread_storage_sync.cc | 7 ---
src/tir/transforms/unroll_loop.cc | 4 --
src/tir/transforms/update_pointer_storage_scope.cc | 8 ---
src/tir/transforms/update_pointer_storage_scope.h | 2 -
src/tir/transforms/vectorize_loop.cc | 16 ------
src/tir/usmp/analysis/extract_buffer_info.cc | 7 +--
src/tir/usmp/transform/create_io_allocates.cc | 6 --
tests/python/integration/test_reduce.py | 4 +-
.../unittest/test_tir_transform_storage_rewrite.py | 8 +--
78 files changed, 19 insertions(+), 873 deletions(-)
