quic-sanirudh opened a new issue, #14980:
URL: https://github.com/apache/tvm/issues/14980
When working on a scheduling code, I ran into an error where the
`debug_mask="all"` being true for Schedule causes an error while applying
cache_read
### Expected behavior
The cache_read should work without any errors or the Verifier to detect some
issue with the actual IR
### Actual behavior
The error here is due to an unimplemented dispatch function for
`arith.IterSplitExpr`.
### Environment
Ubuntu-18.04 and latest main branch of TVM
### Steps to reproduce
```python
import tvm
from tvm.script import tir as T
@T.prim_func
def d2s(lv159: T.Buffer((T.int64(1), T.int64(8), T.int64(128), T.int64(128),
T.int64(32)), "uint8"), T_layout_trans: T.Buffer((T.int64(1), T.int64(2),
T.int64(256), T.int64(256), T.int64(32)), "uint8")):
T.func_attr({"global_symbol": "main", "tir.noalias": T.bool(True)})
# with T.block("root"):
for ax0, ax1, ax2, ax3, ax4 in T.grid(T.int64(1), T.int64(2),
T.int64(256), T.int64(256), T.int64(32)):
with T.block("T_layout_trans_1"):
v_ax0, v_ax1, v_ax2, v_ax3, v_ax4 = T.axis.remap("SSSSS", [ax0,
ax1, ax2, ax3, ax4])
T_layout_trans[v_ax0, v_ax1, v_ax2, v_ax3, v_ax4] = lv159[v_ax0,
(T.truncmod(v_ax2, T.int64(2)) * T.int64(128) + T.truncmod(v_ax3, T.int64(2)) *
T.int64(64) + (v_ax1 * T.int64(32) + v_ax4)) // T.int64(32), 0, 0, 0]
def main():
sch = tvm.tir.Schedule(d2s, debug_mask="all")
sch.cache_read("T_layout_trans_1", 0, "global")
if __name__ == "__main__":
main()
```
### Triage
Please refer to the list of label tags
[here](https://github.com/apache/tvm/wiki/Issue-Triage-Labels) to find the
relevant tags and add them below in a bullet format (example below).
* tir:arith
* tir:schedule
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