tqchen commented on code in PR #15517:
URL: https://github.com/apache/tvm/pull/15517#discussion_r1290795949
##########
src/tir/transforms/storage_rewrite.cc:
##########
@@ -1304,6 +1307,18 @@ class VectorTypeAccessChecker : public StmtExprVisitor {
}
}
+ if (detect_scalar_read_patterns_ && is_buffer_load && indices.size()) {
+ const PrimExpr last_dim_index = indices[indices.size() - 1];
+ if (last_dim_index.dtype().lanes() == 1) {
+ arith::ModularSet me = analyzer_.modular_set(last_dim_index);
+ if (me->coeff > 0) {
+ // When coeff == 0, the index is constant and doesn't need to be
recorded since it can
+ // always be rewritten to shuffle.
+ var_info.access_dtype.insert(access_dtype.with_lanes(me->coeff));
Review Comment:
the main corner case would be when we do not have writes and only reads.
--
This is an automated message from the Apache Git Service.
To respond to the message, please log on to GitHub and use the
URL above to go to the specific comment.
To unsubscribe, e-mail: [email protected]
For queries about this service, please contact Infrastructure at:
[email protected]
