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https://issues.apache.org/jira/browse/HADOOP-19655?page=com.atlassian.jira.plugin.system.issuetabpanels:comment-tabpanel&focusedCommentId=18016175#comment-18016175
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ASF GitHub Bot commented on HADOOP-19655:
-----------------------------------------
PeterPtroc opened a new pull request, #7896:
URL: https://github.com/apache/hadoop/pull/7896
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### Description of PR
- Implements a CLMUL-based 16B fold + Barrett reduction algorithm, adapted
from riscv-crc32-clmul.
- True interleaved (round-robin) multi-block pipeline (1–3 blocks) to
increase ILP.
- Small buffers and tails fall back to the existing table-based software
path.
- Runtime gating:
- Double-checked detection: “zbc” in /proc/cpuinfo AND a SIGILL-safe CLMUL
probe.
### How was this patch tested?
- Build (native profile):
- mvn -pl hadoop-common-project/hadoop-common -am -Pnative -DskipTests
clean install
- Run benchmark:
- mvn -Pnative -DskipTests -Dexec.classpathScope=test
-Dexec.mainClass=org.apache.hadoop.util.Crc32PerformanceTest
### For code changes:
- [x] Does the title or this PR starts with the corresponding JIRA issue id
(e.g. 'HADOOP-17799. Your PR title ...')?
- [ ] Object storage: have the integration tests been executed and the
endpoint declared according to the connector-specific documentation?
- [x] If adding new dependencies to the code, are these dependencies
licensed in a way that is compatible for inclusion under [ASF
2.0](http://www.apache.org/legal/resolved.html#category-a)?
- [ ] If applicable, have you updated the `LICENSE`, `LICENSE-binary`,
`NOTICE-binary` files?
> Add RISC-V Zbc (CLMUL) hardware-accelerated CRC32/CRC32C implementation
> -----------------------------------------------------------------------
>
> Key: HADOOP-19655
> URL: https://issues.apache.org/jira/browse/HADOOP-19655
> Project: Hadoop Common
> Issue Type: Improvement
> Components: hadoop-common, performance
> Affects Versions: 3.5.0
> Reporter: Ptroc
> Priority: Major
> Fix For: 3.5.0
>
>
> This patch introduces hardware-accelerated CRC32 and CRC32C algorithms for
> RISC-V platforms supporting the Zbc extension (CLMUL instructions) in
> bulk_crc32_riscv.c.
> Key changes:
> * Implements optimized CRC32 and CRC32C routines using CLMUL instructions
> for zlib and Castagnoli polynomials.
> * Automatically switches to hardware acceleration when Zbc is available,
> otherwise falls back to generic table-based software implementation.
> * Maintains compatibility with platforms lacking Zbc support.
> This optimization improves CRC performance on RISC-V CPUs with Zbc extension.
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