Kent del Pino <kentdelp...@gmail.com> wrote: > Just a little thing, since I did cables this weekend for the FCDEV3B board.
Hi Kent, and welcome to our little odd community. :-) > I have only seen the PCB on my table, not the schematics. There are no graphical schematics for the FCDEV3B because the "schematic" design for this board was done in a non-graphical manner, using the structural subset of Verilog as the primary design input language and some of my own custom netlist manipulation tools. The non-graphical "schematic" source for our board can be found here: ftp://ftp.freecalypso.org/pub/GSM/FreeCalypso/fcdev3b/fcdev3b-netlist-20160127.zip > If one is using a FTDI FT2232D unit, you have, between an output-pin(the > generator) and the input-pin's protective diodes to Vcc, a difference of > almost 0.5V. Correct. However, look at the DC Parameters table on page 4 of this Calypso chip document: ftp://ftp.freecalypso.org/pub/GSM/Calypso/cal000_a.pdf The Vih line (High-level input voltage) lists the allowed maximum as VDDS + 0.5 V, so I reasoned that TI designed their chip to be tolerant of inputs coming from 3.3V logic. > I think it's a good idea to limit the current in the UART signals with > resistor at about 100 ohm in series. I agree with you in principle, but where would we stick these resistors? Of course if someone is going to make a custom FT2232D board specifically for interfacing to FreeCalypso devices, then everything becomes possible... M~ _______________________________________________ Community mailing list Community@freecalypso.org https://www.freecalypso.org/mailman/listinfo/community