On Saturday, 8 January 2022 22:49:19 CET Jonas Smedegaard wrote: > > Even current generation PinePhone might be made to run a (very) > lightweight telephony-focused stack, on its embedded 32bit 300MHz AR100 > processor. > > I maintain the needed compiler for Debian in package gcc-or1k-elf, and > getting Linux compiled seems doable for someone with the skills (i.e. > not me): https://linux-sunxi.org/AR100#Mainline_Kernel_Support
The AR100 processor in the Allwinner SoCs appears to be used as a kind of microcontroller without memory management unit, at least from what I can understand from that wiki page, so running vanilla Linux would be out of the question. But there are other things it could presumably be asked to do. In the Ingenic JZ4780, which is a MIPS-compatible SoC with two main XBurst cores, there are additional XBurst cores which have microcontroller-like roles. For example, the DMA peripheral has a core called MCU: "MCU in PDMA is a mini CPU compatible with XBurst-1 ISA without implementing CACHE, MMU, DEBUG, FPU and MXU. It is very similar as the AUX in VPU but has different memory mapped control and status register." As the above quote indicates, there is another XBurst core in the video processing unit: "Video Processing Unit (VPU) core in this chip is dedicated for video decoding and encoding. VPU embeds an XBurst® CPU core (named AUX in VPU) and application specified hardware accelerators for common video compress/ decompress algorithms, which includes Stream Parser, Motion Compensation, Motion Estimation, Quant/Inverse Quant, DCT/Inverse DCT and De-block engines." Both of these auxiliary cores can only access memory using physical addressing, as I understand it, so they wouldn't be useful for Linux or classic timesharing systems. I believe that some support was being prepared for use of the AUX core mentioned above in Linux as a form of auxiliary core, where the programs running on such cores would be treated specially rather than being normal programs running in the system and appearing in the process table. Previously, someone did some experiments with the AUX core: https://laanwj.github.io/2013/9/27/vpu-proof-of-concept-ingenic-jz4770 As for the AR100 in the Allwinner SoCs, maybe it could be used for more general applications, or maybe someone has been working on a similar approach to that of the Ingenic functionality. For all I know, it might be possible to use any of these microcontroller-style cores to monitor hardware and manage things like telephony, even if such cores are intended for certain specific purposes. I suppose that if it were possible to power down the main cores and just keep the auxiliary core operating (perhaps more feasible with the AR100 given its apparent use with power management), the aim would be to somehow wake up the main cores in a state where they can present the user with an interface upon some kind of telephony event. If that would be too difficult to achieve, perhaps an alternative would be a minimal interface that the auxiliary core might be able to show to the user while the main system wakes up. Anyway, I thought that this would be an opportunity to compare two different processors and look at their provision of additional microcontroller-style cores. Paul _______________________________________________ Community mailing list [email protected] http://lists.goldelico.com/mailman/listinfo.cgi/community http://www.tinkerphones.org
