On Thu, Aug 09, 2012 at 08:09:55PM +0900, Hideki Kato wrote:
> Erik van der Werf:
> <CAKkgGrM83_HsQ5Z2HJupkj=gdeh3+4gm-jmlvevtjroufqn...@mail.gmail.com>:
> >10-15%, really, that low? For my program (on an i7-3930K, going from 6 to
> >12 threads) it is more in the order of 40% extra simulations per second.
>
> In general that number highly depends on the code, architecture of the
> processor (Intel's are usually better than AMD's), memory speed, cache
> size, use of ALUs, etc. For Zen, the number is also about 40% on both
> an i7 3930K (6 to 12 threads) and an i7 920 (4 to 8 threads).
For Zen, I'm not surprised, since I assume that in simulations, you are
matching some larger patterns which involves a lot of time-consuming
hash table lookups which is ideal for hyperthreading. Not sure about
stv. I think it matters a lot on whether you are matching patterns by
explicit test code snippets or by a hash table.
I measured the hyperthreading effect about 2 years ago with a lot older
Pachi version. I think today, the hyperthreading effect would also be
higher, but I cannot test it right now.
> Pasky, modern processors are much more complicated :). There are more
> than two sets of general registers, which are used not only for
> hyperthreading but also register renaming, for example.
Sure, I just tried to sketch a rough explanation. I did not know that
hyperthreading could reduce opportunity for register renaming, though.
Petr "Pasky" Baudis
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