On Fri, Jan 18, 2002 at 10:22:34AM -0500, Dave Seff wrote: > Yea. I had the same problem. I finally managed to get it to work with the > vanilla modules that come with mdk8.1. However I don't think that the > video1394 is working too well. I can control my dv camera now but can't get > video. > > -Dave
Better apply the following patch to get the CVS version to compile
with 2.4.17:
--- pcilynx.c Thu Jan 17 04:26:47 2002
+++ pcilynx.c Fri Jan 18 12:52:41 2002
@@ -56,8 +56,10 @@
#endif
+static struct ti_lynx cards[MAX_PCILYNX_CARDS];
static struct hpsb_host_driver *lynx_driver;
static unsigned int card_id;
+static int num_of_cards = 0;
/*
* PCL handling functions.
Warning: I did not test pcilynx, but the newest ohci1394
driver with additional patch posted below, is better on
my system. The patch probably is in linux1394 CVS meanwhile.
Regards,
Reinhard
--- ohci1394.c.orig Wed Jan 16 22:25:56 2002
+++ ohci1394.c Fri Jan 18 10:26:34 2002
@@ -365,6 +365,12 @@
mdelay(1);
}
+ /* Now reenable LPS, since that's usually what we want after a
+ * softreset anyway. Wait 50msec to make sure we have full link
+ * enabled. */
+ reg_write(ohci, OHCI1394_HCControlSet, 0x00080000);
+ mdelay(50);
+
DBGMSG (ohci->id, "Soft reset finished");
}
@@ -487,9 +493,6 @@
spin_lock_init(&ohci->phy_reg_lock);
spin_lock_init(&ohci->event_lock);
- /* Soft reset */
- ohci_soft_reset(ohci);
-
/* Put some defaults to these undefined bus options */
buf = reg_read(ohci, OHCI1394_BusOptions);
buf |= 0x60000000; /* Enable CMC and ISC */
@@ -497,16 +500,6 @@
buf &= ~0x98000000; /* Disable PMC, IRMC and BMC */
reg_write(ohci, OHCI1394_BusOptions, buf);
- /* Set Link Power Status (LPS) */
- reg_write(ohci, OHCI1394_HCControlSet, 0x00080000);
-
- /* After enabling LPS, we need to wait for the connection
- * between phy and link to be established. This should be
- * signaled by the LPS bit becoming 1, but this happens
- * immediately. There seems to be no consistent way to wait
- * for this, but 50ms seems to be enough. */
- mdelay(50);
-
/* Set the bus number */
reg_write(ohci, OHCI1394_NodeID, 0x0000ffc0);
@@ -2090,9 +2083,14 @@
DBGMSG(ohci->id, "Remapped memory spaces reg 0x%p", ohci->registers);
+
+ /* Start off with a softreset, to clear every to a sane state.
+ * This will also set Link Power State (LPS), which we need in
+ * order to start accessing most of the registers. */
+ ohci_soft_reset(ohci);
+
/* determinte the number of available IR and IT contexts right away,
because they need to be known for alloc_dma_*_ctx() */
-
ohci->nb_iso_rcv_ctx =
get_nb_iso_ctx(ohci, OHCI1394_IsoRecvIntMaskSet);
DBGMSG(ohci->id, "%d iso receive contexts available",
--
Software-Engineer, Developer for Embedded Devices
Project: HyperPen Tablet USB Driver for Linux
GnuPG Public Key available on request
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