Levi Ramsey wrote on Wed, Oct 09, 2002 at 06:15:58PM -0400 :
> 
> The underlying flaw is that the C3 misreports itself.  That is a big
> no-no.

I was privy to a conversation that a kernel developer made the following
comments:

Oh, I point out that C3 really is:
* an i686 [cmov is actually optional]
* with the i586 instruction set [ok, really k6-2 insn set]
* that schedules like i486

In the new kernels (2.5 series), this CPU is being treated as a 486
with MMX+3DNOW.

> The bulk of the blame rests on VIA (or possibly the kernel developers).

I think it's a little of both.

Blue skies...                   Todd
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