On 10/03/15 01:38, David Holmes wrote: > PS. You state: "Corresponds to C11 atomic_compare_exchange_strong." Yet > that would match with the full bi-directional fences of the VM > implementation (due to memory_order_seq_cst), not a volatile read > followed by a volatile write (which would be memory_order_acq_rel).
Sequential consistency between atomics does not require full bidirectional fences with regard to other non-volatile memory accesses. Andrew.
