Hi Carl-Daniel, On Fri, Feb 01, 2008 at 11:07:04PM +0100, Carl-Daniel Hailfinger wrote: > I had one similar report from another user of rev 1.x of the board. The > change slipped in, it was there to reduce differences on rev 2.x > boards, but it turned out that it was not related to the flashrom issues > and will cause flashing on rev 1.x to fail. > > See above. Could you send a patch to revert it and change the comment > above the reverted line to > "SIO pin set 2 input mode"
Sure. Thanks for your swift response! Patch attached, will commit unless there are objections. Thanks, Ward. > Such a patch is acked in advance. > Acked-by: Carl-Daniel Hailfinger <[EMAIL PROTECTED]> -- Ward Vandewege <[EMAIL PROTECTED]> Free Software Foundation - Senior System Administrator
This patch reverses an erroneous change that sneaked in during r2972, and broke flashrom on the plcc-based rev 1 and 1.1 of the Gigabyte m57sli-s4 board. Signed-off-by: Ward Vandewege <[EMAIL PROTECTED]> Index: src/mainboard/gigabyte/m57sli/Config.lb =================================================================== --- src/mainboard/gigabyte/m57sli/Config.lb (revision 3086) +++ src/mainboard/gigabyte/m57sli/Config.lb (working copy) @@ -309,8 +309,8 @@ #irq 0xc3 = 0x0 # SIO pin set 1 input mode #irq 0xc8 = 0x0 - # SIO pin set 2 mixed input/output mode - irq 0xc9 = 0x40 + # SIO pin set 2 input mode + irq 0xc9 = 0x0 # SIO pin set 4 input mode #irq 0xcb = 0x0 # Generate SMI# on EC IRQ
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