On Mon, Feb 11, 2008 at 01:57:40AM +0100, Carl-Daniel Hailfinger wrote: > Signed-off-by: Carl-Daniel Hailfinger <[EMAIL PROTECTED]>
Acked-by: Peter Stuge <[EMAIL PROTECTED]> > Index: LinuxBIOSv3-carsize_Kconfig/include/arch/x86/amd_geodelx.h > =================================================================== > --- LinuxBIOSv3-carsize_Kconfig/include/arch/x86/amd_geodelx.h > (Revision 586) > +++ LinuxBIOSv3-carsize_Kconfig/include/arch/x86/amd_geodelx.h > (Arbeitskopie) > @@ -565,8 +565,8 @@ > #define SMM_SIZE 128 /* changed SMM_SIZE > from 256 KB to 128 KB */ > > /* ------------------------ */ > -#define DCACHE_RAM_SIZE 0x08000 > -#define DCACHE_RAM_BASE 0x80000 > +#define DCACHE_RAM_SIZE CONFIG_CARSIZE > +#define DCACHE_RAM_BASE CONFIG_CARBASE > /* This is where the DCache will be mapped and be used as stack. It would be > * cool if it was the same base as coreboot normal stack. > */ > Index: LinuxBIOSv3-carsize_Kconfig/arch/x86/Kconfig > =================================================================== > --- LinuxBIOSv3-carsize_Kconfig/arch/x86/Kconfig (Revision 586) > +++ LinuxBIOSv3-carsize_Kconfig/arch/x86/Kconfig (Arbeitskopie) > @@ -69,4 +69,17 @@ > coreboot work correctly on symmetric multi processor > systems. > It is usually set in mainboard/*/Kconfig. > - > + > +config CARBASE > + hex > + default 0x8f000 if CPU_I586 > + default 0x80000 if CPU_AMD_GEODELX > + help > + This option sets the base address of the area used for CAR. > + > +config CARSIZE > + hex > + default 0x1000 if CPU_I586 > + default 0x8000 if CPU_AMD_GEODELX > + help > + This option sets the size of the area used for CAR. > Index: LinuxBIOSv3-carsize_Kconfig/arch/x86/stage0_i586.S > =================================================================== > --- LinuxBIOSv3-carsize_Kconfig/arch/x86/stage0_i586.S (Revision 586) > +++ LinuxBIOSv3-carsize_Kconfig/arch/x86/stage0_i586.S (Arbeitskopie) > @@ -183,18 +183,9 @@ > * the other is very similar to the AMD CAR, except remove amd specific msr > */ > > -#ifndef CONFIG_CARSIZE > -#define CacheSize 4096 > -#else > #define CacheSize CONFIG_CARSIZE > -#endif > > -/* pick a safer value for default -- i.e. not the C segment! */ > -#ifndef CONFIG_CARBASE > -#define CacheBase (0x90000 - CacheSize) > -#else > #define CacheBase CONFIG_CARBASE > -#endif > > #define ASSEMBLY > #include "mtrr.h" > > -- coreboot mailing list [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
