Author: hailfinger
Date: 2008-02-13 16:35:30 +0100 (Wed, 13 Feb 2008)
New Revision: 589

Modified:
   coreboot-v3/northbridge/amd/geodelx/geodelxinit.c
   coreboot-v3/southbridge/amd/cs5536/cs5536.c
Log:
Nuke superfluous comments for C beginners in for loops.

Signed-off-by: Carl-Daniel Hailfinger <[EMAIL PROTECTED]>
Acked-by: Ronald G. Minnich <[EMAIL PROTECTED]>


Modified: coreboot-v3/northbridge/amd/geodelx/geodelxinit.c
===================================================================
--- coreboot-v3/northbridge/amd/geodelx/geodelxinit.c   2008-02-12 20:31:42 UTC 
(rev 588)
+++ coreboot-v3/northbridge/amd/geodelx/geodelxinit.c   2008-02-13 15:35:30 UTC 
(rev 589)
@@ -471,7 +471,7 @@
        struct msr msr;
        struct msrinit *gating = clock_gating_default;
 
-       for (/* Nothing */; gating->msrnum != 0xffffffff; gating++) {
+       for (; gating->msrnum != 0xffffffff; gating++) {
                msr = rdmsr(gating->msrnum);
                msr.hi |= gating->msr.hi;
                msr.lo |= gating->msr.lo;
@@ -487,7 +487,7 @@
        struct msr msr;
        struct msrinit *prio = geode_link_priority_table;
 
-       for (/* Nothing */; prio->msrnum != 0xffffffff; prio++) {
+       for (; prio->msrnum != 0xffffffff; prio++) {
                msr = rdmsr(prio->msrnum);
                msr.hi |= prio->msr.hi;
                msr.lo &= ~0xfff;
@@ -539,7 +539,7 @@
        }
 
        /* Load up C000 settings in eax. */
-       for (/* Nothing */; bit; bit--) {
+       for (; bit; bit--) {
                msr.lo <<= 8;
                msr.lo |= 1;    /* Cache disable PCI/Shadow memory. */
                if (shadowByte && (1 << bit))
@@ -559,7 +559,7 @@
        }
 
        /* Load up E000 settings in eax. */
-       for (/* Nothing */; bit; bit--) {
+       for (; bit; bit--) {
                msr.lo <<= 8;
                msr.lo |= 1;    /* Cache disable PCI/Shadow memory. */
                if (shadowByte && (1 << bit))

Modified: coreboot-v3/southbridge/amd/cs5536/cs5536.c
===================================================================
--- coreboot-v3/southbridge/amd/cs5536/cs5536.c 2008-02-12 20:31:42 UTC (rev 
588)
+++ coreboot-v3/southbridge/amd/cs5536/cs5536.c 2008-02-13 15:35:30 UTC (rev 
589)
@@ -492,7 +492,7 @@
        if (!IsS3Resume())
        {
                struct acpi_init *aci = acpi_init_table;
-               for (/* Nothing */; aci->ioreg; aci++) {
+               for (; aci->ioreg; aci++) {
                        outl(aci->regdata, aci->ioreg);
                        inl(aci->ioreg);
                }
@@ -517,7 +517,7 @@
        wrmsr(GLPCI_SB_CTRL, msr);
 
        csi = SB_MASTER_CONF_TABLE;
-       for (/* Nothing */; csi->msrnum; csi++) {
+       for (; csi->msrnum; csi++) {
                msr.lo = csi->msr.lo;
                msr.hi = csi->msr.hi;
                wrmsr(csi->msrnum, msr);
@@ -533,7 +533,7 @@
        /* TODO: Why the extra block here? Can it be removed? */
        {
                csi = CS5536_CLOCK_GATING_TABLE;
-               for (/* Nothing */; csi->msrnum; csi++) {
+               for (; csi->msrnum; csi++) {
                        msr.lo = csi->msr.lo;
                        msr.hi = csi->msr.hi;
                        wrmsr(csi->msrnum, msr);


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