Quoting Tom Sylla <[EMAIL PROTECTED]>: > If you want to look at the GPIOs, from the 82801DB datasheet, it looks > like you should look at: > > 9.1.14 GPIOBASE—GPIO Base Address (LPC I/F—D31:F0)
0x00000501 > and > 9.1.15 GPIO_CNTL—GPIO Control (LPC I/F—D31:F0) > (offsets 58 and 5c in D31:f0, lspci -xxx as root is one way to dump) 0x10 > > What value is in those registers? Check to see if an address is > assigned, and if the decode is enabled. If so, you have something to > dump. > > That register is not a real PCI BAR, so it may not show up in /proc/ioports > > Once you have the base address, you can read the GPIO control > registers from /dev/port, with the seek equal to the base address. How?? This is the part I am looking for, this would be the golden ticket:-) > It > looks like the register set is described in: > > 9.10 General Purpose I/O Registers (D31:F0) > > and Table 9-12 in the 82801DB datasheet. > Yup, that is what I am going to reference it with. Thanks for you help Tom. Thanks - Joe -- coreboot mailing list [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
