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Hi Peter,

thanks for your fast response.


On Thu Jul 3 12:19:21 CEST 2008, Peter Stuge wrote:
> I've attached a kludge fix to disable
> the offending code to the ticket:
> 
> http://tracker.coreboot.org/trac/coreboot/ticket/102

With this workaround the write attempt works successfully (see below), so in my 
opinion the status of the W25x80 can be set to "tested"   :-)


- ----> successfull writing:
[EMAIL PROTECTED] flashrom]# ./flashrom -wv ../g1-bios.rom
Calibrating delay loop... OK.
No coreboot table found.
Found chipset "Intel ICH7/ICH7R", enabling flash write... OK.
Found chip "Winbond W25x80" (1024 KB) at physical address 0xfff00000.
===
This flash part has status UNTESTED for operations: PROBE READ ERASE WRITE
Please email a report to [EMAIL PROTECTED] if any of the above operations
work correctly for you with this flash part. Please include the full output
from the program, including chipset found. Thank you for your help!
===
Flash image seems to be a legacy BIOS. Disabling checks.
Programming page:
DONE BLOCK 0x0
DONE BLOCK 0x10000
DONE BLOCK 0x20000
DONE BLOCK 0x30000
DONE BLOCK 0x40000
DONE BLOCK 0x50000
DONE BLOCK 0x60000
DONE BLOCK 0x70000
DONE BLOCK 0x80000
DONE BLOCK 0x90000
DONE BLOCK 0xa0000
DONE BLOCK 0xb0000
DONE BLOCK 0xc0000
DONE BLOCK 0xd0000
DONE BLOCK 0xe0000
DONE BLOCK 0xf0000

Verifying flash... VERIFIED.


Best Regards
  Björn
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