On 20.07.2008 02:55, Stefan Reinauer wrote: > Carl-Daniel Hailfinger wrote: >>> >>> flashrom -c MX25L8005 -w g33ds3r.f7h >>> >> >> That's interesting. This command does write to the chip without erasing >> first, so the image you now have in ROM is supposed to be a mixture of >> the old and new BIOS. > The ichspi driver erases a block prior to writing it, as all the > non-spi drivers do. The only behavior that would possibly make sense > from a user perspective.
Ah yes. I forgot about the silent data corruption bug in the ICH SPI driver. It works most of the time, but there are quite a few chips listed in flashchips.c which will act weird or require a separate erase call. Besides that, the block erase code does not belong in the chipset driver, it belongs in the flash chip driver. Regards, Carl-Daniel -- http://www.hailfinger.org/ -- coreboot mailing list [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
