Hi list,
So, i'm having problems with enabling L1 cache on this Pentium MMX
233. The current code (called after raminit still in non-RAM part)
goes here:
static void m1531_enable_l1(const struct mem_controller *ctrl) {
uint8_t reg;
asm volatile(
"invd" "\n\t"
:: );
reg = pci_read_config8(ctrl->d0, L1CDBC);
reg |= 1;
pci_write_config8(ctrl->d0,L1CDBC,reg);
asm volatile(
"movl %%cr0, %%eax" "\n\t"
"andl $0x9FFFFFFF, %%eax" "\n\t"
"movl %%eax, %%cr0" "\n\t"
::: "eax"
);
}
And yes, i know that that code isn't exactly to the guidelines, but
after i get it to work i can work on that.
Including this code causes the board to immediately reset/reboot upon
trying to jump to coreboot.
The only clue/idea i've got is that maybe it needs some MSR stuff to
work, but i really don't know.
Any ideas, comments, etc welcomed.
--
urjaman
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