On 27.07.2008 17:55, ron minnich wrote: > On Sun, Jul 27, 2008 at 7:36 AM, Stefan Reinauer <[EMAIL PROTECTED]> wrote: > > >> Since we know how big our RAM is when we copy coreboot to RAM, I suggest >> that we copy coreboot to the end of memory and run it from there. It is >> a pretty good assumption that no payload will require that space. During >> memory map creation, we just reserve 256k at the upper end, and we're good. >> > > works for me. I like it. >
AFAICS this means for v3 that we require stage2 to be PIC like initram. I'm not entirely happy about that because of possible toolchain issues (mostly untested path). Regards, Carl-Daniel -- http://www.hailfinger.org/ -- coreboot mailing list [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
