Marc Jones wrote:
Carl-Daniel Hailfinger wrote:
On 28.07.2008 22:34, Marc Jones wrote:
Peter Stuge wrote:
On Mon, Jul 28, 2008 at 01:13:43PM -0600, Marc Jones wrote:
There is FAM10 (K10) support in coreboot. The platform would need
to be ported to the Fam10 code. I would be happy to assist anyone
who would like to do the port.
Does the Fam10 code also handle K8 or would there be one coreboot
target for m57sli+k8 and one for m57sli+fam10 ?
There needs to be one for each. The fam10 code has some significant
differences.
Would it be possible to support both K8 and K10 in one image? I gather
that the code is not entirely different, so sharing some stuff may be
possible.
The big issue I see is CAR setup. I can code up a version of the CAR
code which has no ifdefs and handles both family 0Fh and family 10h.
That depends on whether there's a short code sequence not using too many
registers which can detect family 10h presence. AFAICS CPUID always
clobbers EAX,EBX,ECX,EDX, so we need to have that sequence quite early
and store the result somewhere.
The CPUs are socket compatible but they are a generation apart. The MC,
HT and much of the CPU init are different. You would need complete
versions of all the init for both families and the runtime checking on
what path to take. Basically, you have two BIOS in one. I don't know if
that is the right thing to work on but I guess if you are motivated....
patch away.
Marc
Hmmm.. We already do two BIOS in one. You could do cpuid detection in a
failover image and then choose between a fam10 and a K8 image. It would
require some work around the image building and you would still need to
do a mainboard port for fam10.
Marc
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Marc Jones
Senior Firmware Engineer
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mailto:[EMAIL PROTECTED]
http://www.amd.com/embeddedprocessors
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