Author: stepan
Date: 2008-08-01 14:11:00 +0200 (Fri, 01 Aug 2008)
New Revision: 3455
Modified:
trunk/coreboot-v2/src/cpu/intel/model_69x/model_69x_init.c
trunk/coreboot-v2/src/cpu/intel/model_6dx/model_6dx_init.c
trunk/coreboot-v2/src/cpu/intel/model_6xx/model_6xx_init.c
Log:
match against all steppings of a CPU model, because these are _model_ drivers.
(trivial)
Signed-off-by: Stefan Reinauer <[EMAIL PROTECTED]>
Acked-by: Stefan Reinauer <[EMAIL PROTECTED]>
Modified: trunk/coreboot-v2/src/cpu/intel/model_69x/model_69x_init.c
===================================================================
--- trunk/coreboot-v2/src/cpu/intel/model_69x/model_69x_init.c 2008-08-01
12:06:08 UTC (rev 3454)
+++ trunk/coreboot-v2/src/cpu/intel/model_69x/model_69x_init.c 2008-08-01
12:11:00 UTC (rev 3455)
@@ -38,7 +38,8 @@
.init = model_69x_init,
};
static struct cpu_device_id cpu_table[] = {
- { X86_VENDOR_INTEL, 0x0695 }, /* Pentium M */
+ { X86_VENDOR_INTEL, 0x0690 }, /* Pentium M */
+ { X86_VENDOR_INTEL, 0x0695 },
{ 0, 0 },
};
Modified: trunk/coreboot-v2/src/cpu/intel/model_6dx/model_6dx_init.c
===================================================================
--- trunk/coreboot-v2/src/cpu/intel/model_6dx/model_6dx_init.c 2008-08-01
12:06:08 UTC (rev 3454)
+++ trunk/coreboot-v2/src/cpu/intel/model_6dx/model_6dx_init.c 2008-08-01
12:11:00 UTC (rev 3455)
@@ -38,6 +38,7 @@
.init = model_6dx_init,
};
static struct cpu_device_id cpu_table[] = {
+ { X86_VENDOR_INTEL, 0x06D0 }, /* Pentium M on 90nm with 2MiB of L2
cache */
{ X86_VENDOR_INTEL, 0x06D6 }, /* Pentium M on 90nm with 2MiB of L2
cache */
{ 0, 0 },
};
Modified: trunk/coreboot-v2/src/cpu/intel/model_6xx/model_6xx_init.c
===================================================================
--- trunk/coreboot-v2/src/cpu/intel/model_6xx/model_6xx_init.c 2008-08-01
12:06:08 UTC (rev 3454)
+++ trunk/coreboot-v2/src/cpu/intel/model_6xx/model_6xx_init.c 2008-08-01
12:11:00 UTC (rev 3455)
@@ -44,17 +44,21 @@
.init = model_6xx_init,
};
static struct cpu_device_id cpu_table[] = {
+ { X86_VENDOR_INTEL, 0x0650 },
{ X86_VENDOR_INTEL, 0x0652 },
- { X86_VENDOR_INTEL, 0x0665 }, /* Celeron (Mendocino) */
+ { X86_VENDOR_INTEL, 0x0660 }, /* Celeron (Mendocino) */
+ { X86_VENDOR_INTEL, 0x0665 },
{ X86_VENDOR_INTEL, 0x0672 },
{ X86_VENDOR_INTEL, 0x0673 },
+ { X86_VENDOR_INTEL, 0x0680 },
{ X86_VENDOR_INTEL, 0x0681 },
{ X86_VENDOR_INTEL, 0x0683 },
{ X86_VENDOR_INTEL, 0x0686 },
{ X86_VENDOR_INTEL, 0x06A0 },
{ X86_VENDOR_INTEL, 0x06A1 },
{ X86_VENDOR_INTEL, 0x06A4 },
- { X86_VENDOR_INTEL, 0x06B4 }, /* Mobile Celeron FCBGA */
+ { X86_VENDOR_INTEL, 0x06B0 }, /* Mobile Celeron FCBGA */
+ { X86_VENDOR_INTEL, 0x06B4 },
{ 0, 0 },
};
--
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