Author: rminnich
Date: 2008-08-01 19:26:06 +0200 (Fri, 01 Aug 2008)
New Revision: 704

Added:
   coreboot-v3/arch/x86/amd/k8/
   coreboot-v3/arch/x86/amd/k8/stage1.c
Removed:
   coreboot-v3/arch/x86/amd/k8/stage1.c
   coreboot-v3/arch/x86/amdk8/
Log:
move amdk8 to amd/k8 per IRC discussion
Signed-off-by: Ronald G. Minnich <[EMAIL PROTECTED]>
Acked-by: Peter Stuge <[EMAIL PROTECTED]>



Deleted: coreboot-v3/arch/x86/amd/k8/stage1.c
===================================================================
--- coreboot-v3/arch/x86/amdk8/stage1.c 2008-08-01 17:03:22 UTC (rev 702)
+++ coreboot-v3/arch/x86/amd/k8/stage1.c        2008-08-01 17:26:06 UTC (rev 
704)
@@ -1,42 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
- */
-
-#include <types.h>
-#include <lib.h>
-#include <console.h>
-#include <msr.h>
-#include <amd_k8.h>
-
-/**
- * Disable Cache As RAM (CAR) after memory is setup.
- *
- * Unknown how to do this just yet. 
- */
-void disable_car(void)
-{
-       /* OK, here is the theory: we should be able to copy 
-        * the data back over itself, and the wbinvd should then 
-        * flush to memory. Let's see. 
-        */
-       __asm__ __volatile__("cld; rep movsl" ::"D" (DCACHE_RAM_BASE), "S" 
(DCACHE_RAM_BASE), "c" (DCACHE_RAM_SIZE/4): "memory");
-       __asm__ __volatile__ ("wbinvd\n");
-       banner(BIOS_DEBUG, "Disable_car: done wbinvd");
-       banner(BIOS_DEBUG, "disable_car: done");
-}

Copied: coreboot-v3/arch/x86/amd/k8/stage1.c (from rev 703, 
coreboot-v3/arch/x86/amdk8/stage1.c)
===================================================================
--- coreboot-v3/arch/x86/amd/k8/stage1.c                                (rev 0)
+++ coreboot-v3/arch/x86/amd/k8/stage1.c        2008-08-01 17:26:06 UTC (rev 
704)
@@ -0,0 +1,42 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2007 Advanced Micro Devices, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+ */
+
+#include <types.h>
+#include <lib.h>
+#include <console.h>
+#include <msr.h>
+#include <amd_k8.h>
+
+/**
+ * Disable Cache As RAM (CAR) after memory is setup.
+ *
+ * Unknown how to do this just yet. 
+ */
+void disable_car(void)
+{
+       /* OK, here is the theory: we should be able to copy 
+        * the data back over itself, and the wbinvd should then 
+        * flush to memory. Let's see. 
+        */
+       __asm__ __volatile__("cld; rep movsl" ::"D" (CONFIG_CARBASE), "S" 
(CONFIG_CARBASE), "c" (CONFIG_CARSIZE/4): "memory");
+       __asm__ __volatile__ ("wbinvd\n");
+       banner(BIOS_DEBUG, "Disable_car: done wbinvd");
+       banner(BIOS_DEBUG, "disable_car: done");
+}


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