Author: rminnich Date: 2008-08-01 20:00:54 +0200 (Fri, 01 Aug 2008) New Revision: 706
Added: coreboot-v3/include/arch/x86/amd/ coreboot-v3/include/arch/x86/amd/k8/ coreboot-v3/include/arch/x86/amd/k8/k8.h coreboot-v3/northbridge/amd/k8/ Removed: coreboot-v3/include/arch/x86/amd_k8.h Log: rename per IRC Signed-off-by: Ronald G. Minnich <[EMAIL PROTECTED]> Acked-by: Peter Stuge <[EMAIL PROTECTED]> Copied: coreboot-v3/include/arch/x86/amd/k8/k8.h (from rev 703, coreboot-v3/include/arch/x86/amd_k8.h) =================================================================== --- coreboot-v3/include/arch/x86/amd/k8/k8.h (rev 0) +++ coreboot-v3/include/arch/x86/amd/k8/k8.h 2008-08-01 18:00:54 UTC (rev 706) @@ -0,0 +1,56 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2007 Advanced Micro Devices, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ +#define ROM_CODE_SEG 0x08 +#define ROM_DATA_SEG 0x10 + +#define CACHE_RAM_CODE_SEG 0x18 +#define CACHE_RAM_DATA_SEG 0x20 + +#define IORR_FIRST 0xC0010016 +#define IORR_LAST 0xC0010019 + +#define MTRR_READ_MEM (1 << 4) +#define MTRR_WRITE_MEM (1 << 3) + +#define SYSCFG_MSR 0xC0010010 +#define SYSCFG_MSR_TOM2En (1 << 21) +#define SYSCFG_MSR_MtrrVarDramEn (1 << 20) +#define SYSCFG_MSR_MtrrFixDramModEn (1 << 19) +#define SYSCFG_MSR_MtrrFixDramEn (1 << 18) +#define SYSCFG_MSR_UcLockEn (1 << 17) +#define SYSCFG_MSR_ChxToDirtyDis (1 << 16) +#define SYSCFG_MSR_ClVicBlkEn (1 << 11) +#define SYSCFG_MSR_SetDirtyEnO (1 << 10) +#define SYSCFG_MSR_SetDirtyEnS (1 << 9) +#define SYSCFG_MSR_SetDirtyEnE (1 << 8) +#define SYSCFG_MSR_SysVicLimitMask ((1 << 8) - (1 << 5)) +#define SYSCFG_MSR_SysAckLimitMask ((1 << 5) - (1 << 0)) + +#define IORR0_BASE 0xC0010016 +#define IORR0_MASK 0xC0010017 +#define IORR1_BASE 0xC0010018 +#define IORR1_MASK 0xC0010019 +#define TOP_MEM 0xC001001A +#define TOP_MEM2 0xC001001D + +#define TOP_MEM_MASK 0x007fffff +#define TOP_MEM_MASK_KB (TOP_MEM_MASK >> 10) + + Deleted: coreboot-v3/include/arch/x86/amd_k8.h =================================================================== --- coreboot-v3/include/arch/x86/amd_k8.h 2008-08-01 17:40:22 UTC (rev 705) +++ coreboot-v3/include/arch/x86/amd_k8.h 2008-08-01 18:00:54 UTC (rev 706) @@ -1,56 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2007 Advanced Micro Devices, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ -#define ROM_CODE_SEG 0x08 -#define ROM_DATA_SEG 0x10 - -#define CACHE_RAM_CODE_SEG 0x18 -#define CACHE_RAM_DATA_SEG 0x20 - -#define IORR_FIRST 0xC0010016 -#define IORR_LAST 0xC0010019 - -#define MTRR_READ_MEM (1 << 4) -#define MTRR_WRITE_MEM (1 << 3) - -#define SYSCFG_MSR 0xC0010010 -#define SYSCFG_MSR_TOM2En (1 << 21) -#define SYSCFG_MSR_MtrrVarDramEn (1 << 20) -#define SYSCFG_MSR_MtrrFixDramModEn (1 << 19) -#define SYSCFG_MSR_MtrrFixDramEn (1 << 18) -#define SYSCFG_MSR_UcLockEn (1 << 17) -#define SYSCFG_MSR_ChxToDirtyDis (1 << 16) -#define SYSCFG_MSR_ClVicBlkEn (1 << 11) -#define SYSCFG_MSR_SetDirtyEnO (1 << 10) -#define SYSCFG_MSR_SetDirtyEnS (1 << 9) -#define SYSCFG_MSR_SetDirtyEnE (1 << 8) -#define SYSCFG_MSR_SysVicLimitMask ((1 << 8) - (1 << 5)) -#define SYSCFG_MSR_SysAckLimitMask ((1 << 5) - (1 << 0)) - -#define IORR0_BASE 0xC0010016 -#define IORR0_MASK 0xC0010017 -#define IORR1_BASE 0xC0010018 -#define IORR1_MASK 0xC0010019 -#define TOP_MEM 0xC001001A -#define TOP_MEM2 0xC001001D - -#define TOP_MEM_MASK 0x007fffff -#define TOP_MEM_MASK_KB (TOP_MEM_MASK >> 10) - - -- coreboot mailing list [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
