Author: stuge
Date: 2008-08-02 05:29:02 +0200 (Sat, 02 Aug 2008)
New Revision: 712
Added:
coreboot-v3/superio/ite/
coreboot-v3/superio/ite/it8716f/
coreboot-v3/superio/ite/it8716f/Makefile
coreboot-v3/superio/ite/it8716f/dts
coreboot-v3/superio/ite/it8716f/it8716f.h
coreboot-v3/superio/ite/it8716f/stage1.c
coreboot-v3/superio/ite/it8716f/superio.c
Modified:
coreboot-v3/Kconfig
Log:
v3: Port ITE IT8716F superio code from v2
Signed-off-by: Peter Stuge <[EMAIL PROTECTED]>
Acked-by: Ronald G. Minnich <[EMAIL PROTECTED]>
Modified: coreboot-v3/Kconfig
===================================================================
--- coreboot-v3/Kconfig 2008-08-02 01:45:04 UTC (rev 711)
+++ coreboot-v3/Kconfig 2008-08-02 03:29:02 UTC (rev 712)
@@ -86,6 +86,8 @@
boolean
config SUPERIO_FINTEK_F71805F
boolean
+config SUPERIO_ITE_IT8716F
+ boolean
# Source all northbridge/southbridge/superio Kconfig files:
source northbridge/intel/i440bxemulation/Kconfig
Added: coreboot-v3/superio/ite/it8716f/Makefile
===================================================================
--- coreboot-v3/superio/ite/it8716f/Makefile (rev 0)
+++ coreboot-v3/superio/ite/it8716f/Makefile 2008-08-02 03:29:02 UTC (rev
712)
@@ -0,0 +1,29 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2008 Peter Stuge <[EMAIL PROTECTED]>
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; either version 2 of the License, or
+## (at your option) any later version.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+##
+
+ifeq ($(CONFIG_SUPERIO_ITE_IT8716F),y)
+
+STAGE0_CHIPSET_OBJ += $(obj)/superio/ite/it8716f/stage1.o
+STAGE0_CHIPSET_OBJ += $(obj)/device/pnp_raw.o
+
+# Always add to variables, as there could be more than one Super I/O.
+STAGE2_CHIPSET_OBJ += $(obj)/superio/ite/it8716f/superio.o
+
+endif
Added: coreboot-v3/superio/ite/it8716f/dts
===================================================================
--- coreboot-v3/superio/ite/it8716f/dts (rev 0)
+++ coreboot-v3/superio/ite/it8716f/dts 2008-08-02 03:29:02 UTC (rev 712)
@@ -0,0 +1,80 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2008 Peter Stuge <[EMAIL PROTECTED]>
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; either version 2 of the License, or
+## (at your option) any later version.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+##
+{
+ /* Floppy */
+ floppydev = "0x0";
+ floppyenable = "0";
+ floppyio = "0x3f0";
+ floppyirq = "0x60";
+ floppydrq = "0x02";
+
+ /* COM1 */
+ com1dev = "1";
+ com1enable = "0";
+ com1io = "0x3f8";
+ com1irq = "4";
+
+ /* COM2 */
+ com2dev = "2";
+ com2enable = "0";
+ com2io = "0x2f8";
+ com2irq = "3";
+
+ /* Parallel port */
+ ppdev = "3";
+ ppenable = "0";
+ ppio = "0x378";
+ ppirq = "7";
+
+ /* Environment controller */
+ ecdev = "4";
+ ecenable = "0";
+
+ /* Keyboard */
+ kbdev = "5";
+ kbenable = "0";
+ kbio = "0x60";
+ kbio2 = "0x62";
+ kbirq = "1";
+ kbirq2 = "12";
+
+ /* Mouse */
+ mousedev = "6";
+ mouseenable = "0";
+
+ /* GPIO */
+ gpiodev = "7";
+ gpioenable = "0";
+
+ /* MIDI port */
+ mididev = "8";
+ midienable = "0";
+
+ /* Game port */
+ gamedev = "9";
+ gameenable = "0";
+ gameio = "0x220";
+ gameio2 = "0x400";
+ gameirq = "9";
+
+ /* Consumer IR */
+ cirdev = "0xa";
+ cirenable = "0";
+};
Added: coreboot-v3/superio/ite/it8716f/it8716f.h
===================================================================
--- coreboot-v3/superio/ite/it8716f/it8716f.h (rev 0)
+++ coreboot-v3/superio/ite/it8716f/it8716f.h 2008-08-02 03:29:02 UTC (rev
712)
@@ -0,0 +1,40 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2006 Uwe Hermann <[EMAIL PROTECTED]>
+ * Copyright (C) 2008 Peter Stuge <[EMAIL PROTECTED]>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+/* Datasheet: http://www.ite.com.tw/product_info/PC/Brief-IT8716_2.asp */
+/* Status: Untested on real hardware, but it compiles. */
+
+#ifndef SUPERIO_ITE_IT8716F_IT8716F_H
+#define SUPERIO_ITE_IT8716F_IT8716F_H
+
+#define IT8716F_FDC 0x00 /* Floppy */
+#define IT8716F_SP1 0x01 /* Com1 */
+#define IT8716F_SP2 0x02 /* Com2 */
+#define IT8716F_PP 0x03 /* Parallel port */
+#define IT8716F_EC 0x04 /* Environment controller */
+#define IT8716F_KBCK 0x05 /* Keyboard */
+#define IT8716F_KBCM 0x06 /* Mouse */
+#define IT8716F_GPIO 0x07 /* GPIO */
+#define IT8716F_MIDI 0x08 /* MIDI port */
+#define IT8716F_GAME 0x09 /* GAME port */
+#define IT8716F_IR 0x0a /* Consumer IR */
+
+#endif /* SUPERIO_ITE_IT8716F_IT8716F_H */
Added: coreboot-v3/superio/ite/it8716f/stage1.c
===================================================================
--- coreboot-v3/superio/ite/it8716f/stage1.c (rev 0)
+++ coreboot-v3/superio/ite/it8716f/stage1.c 2008-08-02 03:29:02 UTC (rev
712)
@@ -0,0 +1,43 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2007 AMD
+ * Written by Yinghai Lu <[EMAIL PROTECTED]> for AMD.
+ * Copyright (C) 2008 Peter Stuge <[EMAIL PROTECTED]>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#include <io.h>
+#include <device/pnp.h>
+#include "it8716f.h"
+
+static void enter_ext(u8 dev)
+{
+ outb(0x87, dev);
+ outb(0x01, dev);
+ outb(0x55, dev);
+ outb(0x4e == dev ? 0xaa : 0x55, dev);
+}
+
+void it8716f_enable_serial(u8 dev, u8 serial, u16 iobase)
+{
+ enter_ext(dev);
+ rawpnp_set_logical_device(dev, serial);
+ rawpnp_set_enable(dev, 0);
+ rawpnp_set_iobase(dev, PNP_IDX_IO0, iobase);
+ rawpnp_set_enable(dev, 1);
+ rawpnp_write_config(dev, 0x02, 0x02);
+}
Added: coreboot-v3/superio/ite/it8716f/superio.c
===================================================================
--- coreboot-v3/superio/ite/it8716f/superio.c (rev 0)
+++ coreboot-v3/superio/ite/it8716f/superio.c 2008-08-02 03:29:02 UTC (rev
712)
@@ -0,0 +1,174 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2006 Uwe Hermann <[EMAIL PROTECTED]>
+ * Copyright (C) 2007 AMD
+ * (Written by Yinghai Lu <[EMAIL PROTECTED]> for AMD)
+ * Copyright (C) 2007 Ward Vandewege <[EMAIL PROTECTED]>
+ * Copyright (C) 2008 Peter Stuge <[EMAIL PROTECTED]>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#include <io.h>
+#include <lib.h>
+#include <device/device.h>
+#include <device/pnp.h>
+#include <console.h>
+#include <string.h>
+#include <uart8250.h>
+#include <keyboard.h>
+#include <statictree.h>
+#include "it8716f.h"
+
+/* Base address 0x2e: 0x87 0x01 0x55 0x55. */
+/* Base address 0x4e: 0x87 0x01 0x55 0xaa. */
+static void pnp_enter_ext_func_mode(struct device *dev)
+{
+ outb(0x87, dev->path.u.pnp.port);
+ outb(0x01, dev->path.u.pnp.port);
+ outb(0x55, dev->path.u.pnp.port);
+
+ if (dev->path.u.pnp.port == 0x4e) {
+ outb(0xaa, dev->path.u.pnp.port);
+ } else {
+ outb(0x55, dev->path.u.pnp.port);
+ }
+}
+
+static void pnp_exit_ext_func_mode(struct device *dev)
+{
+ pnp_write_config(dev, 0x02, 0x02);
+}
+
+#ifdef HAVE_FANCTL
+extern void init_ec(u16 base);
+#else
+static void pnp_write_index(u16 port_base, u8 reg, u8 value)
+{
+ outb(reg, port_base);
+ outb(value, port_base + 1);
+}
+
+static u8 pnp_read_index(u16 port_base, u8 reg)
+{
+ outb(reg, port_base);
+ return inb(port_base + 1);
+}
+
+static void init_ec(u16 base)
+{
+ u8 value;
+
+ /* Read out current value of FAN_CTL control register (0x14). */
+ value = pnp_read_index(base, 0x14);
+ printk(BIOS_DEBUG, "FAN_CTL: reg = 0x%04x, read value = 0x%02x\r\n",
+ base + 0x14, value);
+
+ /* Set FAN_CTL control register (0x14) polarity to high, and
+ activate fans 1, 2 and 3. */
+ pnp_write_index(base, 0x14, value | 0x87);
+ printk(BIOS_DEBUG, "FAN_CTL: reg = 0x%04x, writing value = 0x%02x\r\n",
+ base + 0x14, value | 0x87);
+}
+#endif
+
+
+static void it8716f_pnp_set_resources(struct device *dev)
+{
+ pnp_enter_ext_func_mode(dev);
+ pnp_set_resources(dev);
+ pnp_exit_ext_func_mode(dev);
+}
+
+static void it8716f_pnp_enable_disable(struct device *dev)
+{
+ pnp_enter_ext_func_mode(dev);
+ pnp_enable_resources(dev);
+ pnp_exit_ext_func_mode(dev);
+}
+
+static void it8716f_pnp_enable_resources(struct device *dev)
+{
+ pnp_enter_ext_func_mode(dev);
+ pnp_set_logical_device(dev);
+ pnp_set_enable(dev, dev->enabled);
+ pnp_exit_ext_func_mode(dev);
+}
+
+static struct device_operations ops;
+static struct pnp_info pnp_dev_info[] = {
+ {&ops, IT8716F_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0x07f8, 0},},
+ {&ops, IT8716F_SP1, PNP_IO0 | PNP_IRQ0, {0x7f8, 0},},
+ {&ops, IT8716F_SP2, PNP_IO0 | PNP_IRQ0, {0x7f8, 0},},
+ {&ops, IT8716F_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0x07f8, 0},},
+ {&ops, IT8716F_EC, PNP_IO0 | PNP_IO1 | PNP_IRQ0, {0x7f8, 0},
+ {0x7f8, 0x4},},
+ {&ops, IT8716F_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, {0x7ff, 0},
+ {0x7ff, 0x4},},
+ {&ops, IT8716F_KBCM, PNP_IRQ0,},
+ {&ops, IT8716F_GPIO, PNP_IO1 | PNP_IO2, {0, 0}, {0x7f8, 0}, {0x7f8,
0},},
+ {&ops, IT8716F_MIDI, PNP_IO0 | PNP_IRQ0, {0x7fe, 0x4},},
+ {&ops, IT8716F_GAME, PNP_IO0, {0x7ff, 0},},
+ {&ops, IT8716F_IR,},
+};
+
+static void it8716f_setup_scan_bus(struct device *dev)
+{
+ pnp_enable_devices(dev, &ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
+}
+
+static void it8716f_init(struct device *dev)
+{
+ struct superio_ite_it8716f_dts_config *conf;
+ struct resource *res0, *res1;
+ struct pc_keyboard kbd;
+
+ if (!dev->enabled)
+ return;
+
+ conf = dev->device_configuration;
+
+ /* TODO: FDC, PP, KBCM, MIDI, GAME, IR. */
+ switch (dev->path.u.pnp.device) {
+ case IT8716F_SP1:
+ res0 = find_resource(dev, PNP_IDX_IO0);
+// init_uart8250(res0->base, &conf->com1);
+ break;
+ case IT8716F_SP2:
+ res0 = find_resource(dev, PNP_IDX_IO0);
+// init_uart8250(res0->base, &conf->com2);
+ break;
+ case IT8716F_EC:
+ res0 = find_resource(dev, PNP_IDX_IO0);
+#define EC_INDEX_PORT 5
+ init_ec(res0->base + EC_INDEX_PORT);
+ break;
+ case IT8716F_KBCK:
+ res0 = find_resource(dev, PNP_IDX_IO0);
+ res1 = find_resource(dev, PNP_IDX_IO1);
+ init_pc_keyboard(res0->base, res1->base, &kbd);
+ break;
+ }
+}
+
+static struct device_operations ops = {
+ .phase2_setup_scan_bus = it8716f_setup_scan_bus,
+ .phase4_read_resources = pnp_read_resources,
+ .phase4_set_resources = it8716f_pnp_set_resources,
+ .phase4_enable_disable = it8716f_pnp_enable_disable,
+ .phase5_enable_resources = it8716f_pnp_enable_resources,
+ .phase6_init = it8716f_init,
+};
--
coreboot mailing list
[email protected]
http://www.coreboot.org/mailman/listinfo/coreboot
