Carl-Daniel Hailfinger wrote:
On 06.08.2008 18:54, Marc Jones wrote:
Carl-Daniel Hailfinger wrote:

- "Errata 193: Disable clean copybacks to L3 cache to allow cached ROM."
Erratum 193 seems to be unlisted in public data sheets. If it is the
famous L3 problem, we might want to enable the workaround only on
affected revisions.
This is an errata for early silicon which is why it isn't in the
public rev guide. It is a fix for caching instructions while in CAR
mode. It can be removed. All Ax support could be removed.

Does that removal suggestion really mean all Ax support including the
newly committed Ax microcode updates and the (older) Ax memory
controller stuff?

Yes, It is there for completeness. I don't think it needs to be carried forward to v3.

Marc

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Marc Jones
Senior Firmware Engineer
(970) 226-9684 Office
mailto:[EMAIL PROTECTED]
http://www.amd.com/embeddedprocessors


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