I'll pass this along to the list. Maybe someone will help you.
Greg Chandler wrote:
I was working on this board to get the Linuxbios going so I can use the
PCMCIA bridge/CF working for boot, but have run into some snags with the
document you wrote:
http://www.coreboot.org/VIA_Epia-M%2C_MII_Build_Tutorial

Here's a list of what I have found, and I'm wondering if you can help
set me straight?

{Note I am a fairly advanced hardware guy, have EEPROM programer in case
I mess up, etc...}

1) {not a big deal}
The doc claims that there are 2 firmware chips, yet on inspection of the
board there is only one.  It is 256k and the flashrom util {once built}
does read and verify it.

What the other chip is, I have no idea, since neither the util nor I can
actually find it.

2) {also not a big deal}
Filo config section doesn't have a list of the options, or caveats
upfront about the cs_ide stuff.  There is a section later, but having to
go back and rebuild is annoying.  Also listing USB_DISK=1 as an option
would be helpfull since that is a supported method, and some of the
users may be doing that to jumpstart the first board of many ;)

3) {big problem}
The build when downloading the latest corev2 snapshot doesn't work.
The Makefile is also no longer the same.

The example listed, no longer exists for pre-pending the video bios,
I've figured out what it should be now, but the tutorial is out of date.
The code also has hard paths coded to ~/svn/payload.elf
in both the "fallbackMakefile" and "normal/Makefile" files.

I'm not the expert I used to be, but that's pretty retarded for an
assumption of where the files are going to be at build time...



--
coreboot mailing list
[email protected]
http://www.coreboot.org/mailman/listinfo/coreboot

Reply via email to