Hi Marc, we need your Fam10h expertise for this.
On 24.08.2008 20:32, ron minnich wrote: > On Sun, Aug 24, 2008 at 11:27 AM, Carl-Daniel Hailfinger > <[EMAIL PROTECTED]> wrote: > >> On 24.08.2008 19:49, ron minnich wrote: >> >>> Note there are things left to do that are not at first obvious >>> >>> 1. all core0's in initram have to load microcode >>> >>> >> This is going to hurt. You know that we only have 1k stack on all APs >> (that includes core0 of every non-BSP)? With some ugly trickery, I think >> 2k stack are possible, but you don't want to go there. Our v3 functions >> are not really optimized to fit into a small stack. >> > > fam10 requires microcode load prior to ram setup. We have to make this work. > OK. It's unfortunate, but we can make it work. >> Can't we postpone microcode loading to stage2 or at least past initram? >> > > AMD tells me not for fam10, so we might as well get it right from the start. > > question: if BSP brings up ram, can't APs use that BSP ram? Is there > any reason this would not work? > I think Marc answered parts of this in the thread titled "[coreboot] K8 and Fam10 CAR". Other parts may be answered in the thread titled "[coreboot] AMD64 BKDG questions". These two threads are marked for re-reading in my mail folder because they have lots of valuable info. Looking at http://linuxbios.org/data/yhlu/LinuxBIOS_CAR_09142006.pdf your idea would probably need some re-architecting of the v3 code. Anyway, Marc is probably the only person who can tell us for sure whether it would work. Regards, Carl-Daniel -- http://www.hailfinger.org/ -- coreboot mailing list [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
