On 29.08.2008 12:41, Stefan Reinauer wrote:
> Carl-Daniel Hailfinger wrote:
>
>> + * dev->link[0] for a PCI domain is the domain link.
>> + * The child of the domain link is the PCI bus device.
>>
>>
> "PCI bus device" - is that the host bridge?
>
Let me illustrate this with an excerpt of our device tree.
struct device dev_domain_0 = {
.path = {.type=DEVICE_PATH_PCI_DOMAIN,{.pci_domain={ .domain = 0x0 }}},
.device_configuration = &domain_0,
.ops = &i440bx_domain,
.links = 1,
.link = {
[0] = {
.dev = &dev_domain_0,
.link = 0,
.children = &dev_bus_0
},
},
.bus = &dev_root.link[0],
.dtsname = "domain_0",
.enabled = 1
};
struct device dev_bus_0 = {
.path = {.type=DEVICE_PATH_PCI_BUS,{.pci_bus={ .bus = 0x0 }}},
.next = &dev_domain_0,
.links = 1,
.link = {
[0] = {
.dev = &dev_bus_0,
.link = 0,
.children = &dev_pci_0_0
},
},
.bus = &dev_domain_0.link[0],
.next = &dev_domain_0,
.dtsname = "bus_0",
.enabled = 1
};
struct device dev_pci_0_0 = {
.path = {.type=DEVICE_PATH_PCI,{.pci={ .devfn = PCI_DEVFN(0x0, 0x0)}}},
.sibling = &dev_pci_1_1,
.next = &dev_pci_1_1,
.bus = &dev_bus_0.link[0],
.next = &dev_pci_1_1,
.dtsname = "pci_0_0",
.enabled = 1
};
struct southbridge_intel_i82371eb_ide_config pci_1_1 = {
.ide0_enable = 0x0,
.ide1_enable = 0x0,
}; /*pci_1_1*/
struct device dev_pci_1_1 = {
.path = {.type=DEVICE_PATH_PCI,{.pci={ .devfn = PCI_DEVFN(0x1, 0x1)}}},
.device_configuration = &pci_1_1,
.ops = &i82371eb_ide,
.subsystem_vendor = 0x15ad,
.subsystem_device = 0x1976,
.on_mainboard = 1,
.next = &dev_bus_0,
.bus = &dev_bus_0.link[0],
.next = &dev_bus_0,
.dtsname = "pci_1_1",
.enabled = 1
};
We call pci_domain_scan_bus(dev_domain_0, ...) and dev_domain_0->link[0]
is the PCI domain link. However, pci_scan_bus() expects to be called
with dev_bus_0->link[0] which equals
dev_domain_0->link[0].children->link[0]. "pci bus device" refers to
dev_bus_0.
>> + * If there can be multiple PCI buses below a PCI domain, we have to
>> + * iterate over the PCI buses in a loop.
>>
>>
> Most likely more than one PCI bus is below a PCI domain. There can be an
> arbitrary number of bridges in a PCI domain.
>
Can multiple buses be directly below a domain or do these buses hang off
a bridge on a bus? For the latter case, this should be handled by
pci_scan_bridge.
Regards,
Carl-Daniel
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