All right. I'd love to help fix it. Here's the relevant snippet from
serengeti/dts
/* guesses; we need a real lspci */
[EMAIL PROTECTED],0 {
/config/("northbridge/amd/k8/pci");
[EMAIL PROTECTED],0 {
/config/("southbridge/amd/amd8111/amd8111.dts");
};
[EMAIL PROTECTED],0 {
/config/("southbridge/amd/amd8111/ide.dts");
};
[EMAIL PROTECTED],0 {
/config/("southbridge/amd/amd8111/nic.dts");
};
};
from amd8111.dts:
{
device_operations = "amd8111";
};
from amd8111/ide.dts:
{
device_operations = "amd8111_ide";
ide0_enable = "0";
ide1_enable = "1";
};
from amd8111/nic.dts:
{
device_operations = "amd8111_nic";
phy_lowreset = "0";
};
I see that the device_operations structures get used, but I don't see how
there are parameters being passed here. I'm sorry to be so clueless, I
don't understand the meaning of the dts yet.
Thanks,
Myles
On Mon, Oct 6, 2008 at 2:35 PM, ron minnich <[EMAIL PROTECTED]> wrote:
> On Mon, Oct 6, 2008 at 11:59 AM, Myles Watson <[EMAIL PROTECTED]> wrote:
> > Could you help me understand how we get from this picture from the 8111
> data
> > sheet to the serengeti dts? It looks like to me that the nic and ide
> > portions should be included in the amd8111 dts, not the board dts. I'm
> also
> > confused why the ide and nic entries seem to be on the same bus.
> >
>
> nic and ide are in mainboard dts so we can set control variables.
>
> v3 is like v2 in that dts topology reflects mainboard topology but
> does also show some detailsof chipset topology.
>
> nic and ide on same bus? That's my mistake, pure and simple. The
> mainboard dts is wrong.
>
> We're in the learning phase here on dts for boards like this. We
> understand simple boards like geode boards. This is our first complex
> hierarchy board.
>
> Welcome to Adventure!
>
> ron
>
--
coreboot mailing list: [email protected]
http://www.coreboot.org/mailman/listinfo/coreboot
