Fix the amd8111. 

Remove the device struct for amd8111.c as it is not a device. 

Make sure that the phase4_enable_disable is named (or similar is named) 
in all device structs. 

Fix the mainboard dts to use the 8111 pci as the bridge. Add bridge keyword
to the amd8111 pci dts. 

This gets to this point:

Phase 6: Initializing devices...
Phase 6: Root Device init.
domain_0_pci0_18_0_pci_0_0_pci: Unknown device path type: 0
Phase 6:  init.
domain_0_pci0_18_0_pci_0_0_pci: Unknown device path type: 0
 missing resource: 10


and stop. Still working on that. BUT: the config space shows bus 1 now!

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com

Index: southbridge/amd/amd8111/amd8111.c
===================================================================
--- southbridge/amd/amd8111/amd8111.c	(revision 907)
+++ southbridge/amd/amd8111/amd8111.c	(working copy)
@@ -92,15 +92,3 @@
 	}
 }
 
-struct device_operations amd8111 = {
-	.id = {.type = DEVICE_ID_PCI,
-		{.pci = {.vendor = PCI_VENDOR_ID_AMD,
-			 .device = PCI_DEVICE_ID_AMD_8111_PCI}}},
-	.constructor		 = default_device_constructor,
-	.phase3_scan		 = 0,
-	.phase4_enable_disable	 = amd8111_enable,
-	.phase4_read_resources	 = pci_dev_read_resources,
-	.phase4_set_resources	 = pci_dev_set_resources,
-	.phase6_init		 = NULL,
-	.ops_pci		 = &pci_dev_ops_pci,
-};
Index: southbridge/amd/amd8111/pci.dts
===================================================================
--- southbridge/amd/amd8111/pci.dts	(revision 907)
+++ southbridge/amd/amd8111/pci.dts	(working copy)
@@ -20,4 +20,5 @@
 
 {
 	device_operations = "amd8111_pci";
+	bridge;
 };
Index: southbridge/amd/amd8111/amd8111.dts
===================================================================
--- southbridge/amd/amd8111/amd8111.dts	(revision 907)
+++ southbridge/amd/amd8111/amd8111.dts	(working copy)
@@ -1,23 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2008 Ronald G. Minnich <rminnich@gmail.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
- */
-
-{
-	device_operations = "amd8111";
-};
Index: southbridge/amd/amd8111/usb.c
===================================================================
--- southbridge/amd/amd8111/usb.c	(revision 907)
+++ southbridge/amd/amd8111/usb.c	(working copy)
@@ -50,6 +50,7 @@
 			      .device = PCI_DEVICE_ID_AMD_8111_USB}}},
 	.constructor		 = default_device_constructor,
 	.phase3_scan		 = scan_static_bus,
+	.phase4_enable_disable           = amd8111_enable,
 	.phase4_read_resources	 = pci_dev_read_resources,
 	.phase4_set_resources	 = pci_dev_set_resources,
 	.phase5_enable_resources = pci_dev_enable_resources,
Index: mainboard/amd/serengeti/dts
===================================================================
--- mainboard/amd/serengeti/dts	(revision 907)
+++ mainboard/amd/serengeti/dts	(working copy)
@@ -32,14 +32,14 @@
 		pci0@18,0 {
 			/config/("northbridge/amd/k8/pci");
 			pci@0,0 {
-				/config/("southbridge/amd/amd8111/amd8111.dts");
+				/config/("southbridge/amd/amd8111/pci.dts");
+				pci{
+					/config/("southbridge/amd/amd8111/nic.dts");
+				};
 			};
 			pci@4,0 {
 				/config/("southbridge/amd/amd8111/ide.dts");
 			};
-			pci@5,0 {
-				/config/("southbridge/amd/amd8111/nic.dts");
-			};
 		};
 		pci1@18,0 {
 			/config/("northbridge/amd/k8/pci");
Index: mainboard/amd/serengeti/Makefile
===================================================================
--- mainboard/amd/serengeti/Makefile	(revision 907)
+++ mainboard/amd/serengeti/Makefile	(working copy)
@@ -26,6 +26,7 @@
 			$(src)/arch/x86/stage1_mtrr.c \
 			$(src)/arch/x86/amd/model_fxx/dualcore_id.c \
 			$(src)/arch/x86/amd/model_fxx/stage1.c \
+			$(src)/arch/x86/resourcemap.c \
 			$(src)/northbridge/amd/k8/get_nodes.c \
 			$(src)/northbridge/amd/k8/libstage1.c \
 			$(src)/southbridge/amd/amd8111/stage1_smbus.c \