Dear coreboot readers! This is the automated build check service of coreboot.
The developer "hawke" checked in revision 3661 to the coreboot source repository and caused the following changes: Change Log: * Add a new board, the BCom WinNET P680 * Add a function to change the 24/48Mhz clock input selector on the Winbond W83697 superio to 48Mhz, used by the WinNET P680 Signed-off-by: Alex Mauer <[EMAIL PROTECTED]> Acked-by: Uwe Hermann <[EMAIL PROTECTED]> Build Log: Compilation of bcom:winnetp680 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=3661&device=winnetp680&vendor=bcom Compilation of intel:jarrell has been broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=3661&device=jarrell&vendor=intel Compilation of jetway:j7f24 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=3661&device=j7f24&vendor=jetway Compilation of via:epia-cn is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=3661&device=epia-cn&vendor=via Compilation of via:pc2500e is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=3661&device=pc2500e&vendor=via If something broke during this checkin please be a pain in hawke's neck until the issue is fixed. If this issue is not fixed within 24h the revision should be backed out. Best regards, coreboot automatic build system -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
