Dear coreboot readers! This is the automated build check service of coreboot.
The developer "cozzie" checked in revision 3665 to the coreboot source repository and caused the following changes: Change Log: Final fix for C7 boards, which are still using ROMCC, to be able to build. As far as I know, no C7 boards currently in the tree use SPI flash. Signed-off-by: Corey Osgood <[EMAIL PROTECTED]> Acked-by: Peter Stuge <[EMAIL PROTECTED]> Build Log: Compilation of bcom:winnetp680 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=3665&device=winnetp680&vendor=bcom Compilation of jetway:j7f24 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=3665&device=j7f24&vendor=jetway Compilation of supermicro:h8dmr has been fixed Compilation of via:epia-cn has been fixed Compilation of via:pc2500e has been fixed If something broke during this checkin please be a pain in cozzie's neck until the issue is fixed. If this issue is not fixed within 24h the revision should be backed out. Best regards, coreboot automatic build system -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
