On Wed, Oct 01, 2008 at 02:57:03PM -0600, Marc Jones wrote:
> Marc Jones wrote:
>> Peter Stuge wrote:
>>> Marc Jones wrote:
>>>> Update K8 FID/VID setup. Add support for 100MHz FIDs (revG).
>>>>
>>>> Signed-off-by: Marc Jones <[EMAIL PROTECTED]>
>>>
>>> Looks good.
>>>
>>> Acked-by: Peter Stuge <[EMAIL PROTECTED]>
>>>
>>
>> Thanks Peter, I was going to repost this with some changes. I think
>> that there is a corner case I didn't correctly account for. :)
>>
>
>
> Resubmitting this patch. I think I worked out all the corner cases and
> made it a little easier to understand.
I've tested the patch on my MSI K9N Neo (MS-7260) but I'm not sure if
the changes I've seen in the logs are correct.
It seems the CPU frequency changed from 1.8 to 1.0 MHz. See attached
logs/diffs for more information.
Uwe.
--
http://www.hermann-uwe.de | http://www.holsham-traders.de
http://www.crazy-hacks.org | http://www.unmaintained-free-software.org
--- x86info1.txt 2008-10-22 01:25:22.000000000 +0200
+++ x86info2.txt 2008-10-22 01:25:22.000000000 +0200
@@ -92,19 +92,19 @@
Bank: 2 (0x408)
MC2CTL: 00000000 00001111 11111111 11111111
MC2STATUS: 00000000 00000000 00000000 00000000
-MC2ADDR: 10001111 00110111 11111110 01000110
-MC2MISC: 10001111 00110111 11111110 01000110
+MC2ADDR: 10000111 00110011 11111110 01000110
+MC2MISC: 10000111 00110011 11111110 01000110
Bank: 3 (0x40c)
MC3CTL: 00000000 00000000 00000000 00000111
MC3STATUS: 00000000 00000000 00000000 00000000
-MC3ADDR: 00000111 01111010 11000111 10100101
+MC3ADDR: 10101100 00011111 00100001 11011010
MC3MISC: 00000000 00000000 00000000 00000000
Bank: 4 (0x410)
MC4CTL: 00000000 00000100 00111111 11111111
MC4STATUS: 00000000 00000000 00000000 00000000
-MC4ADDR: 10111001 01000111 11100111 11111000
+MC4ADDR: 10000000 00000000 00000000 00000000
MC4MISC: 00000000 00000000 00000000 00000000
L1 Data TLB (2M/4M): Fully associative. 8 entries.
@@ -174,7 +174,7 @@
MTRRdefType (0x2ff): 0x0000000000000c00
-1.80GHz processor (estimate).
+1.00GHz processor (estimate).
--------------------------------------------------------------------------
CPU #2
@@ -254,25 +254,25 @@
Bank: 0 (0x400)
MC0CTL: 00000000 00000000 00000000 01111111
MC0STATUS: 00000000 00000000 00000000 00000000
-MC0ADDR: 11011000 01100100 01100100 01010100
+MC0ADDR: 01011001 01101100 00100101 01010100
MC0MISC: 00000000 00000000 00000000 00000000
Bank: 1 (0x404)
MC1CTL: 11111111 11111111 11111111 11111111
MC1STATUS: 00000000 00000000 00000000 00000000
-MC1ADDR: 11111111 10110111 11101111 11110101
+MC1ADDR: 11111111 11110111 11101111 11110111
MC1MISC: 00000000 00000000 00000000 00000000
Bank: 2 (0x408)
MC2CTL: 00000000 00001111 11111111 11111111
MC2STATUS: 00000000 00000000 00000000 00000000
-MC2ADDR: 01010000 00000101 01100111 00000101
-MC2MISC: 01010000 00000101 01100111 00000101
+MC2ADDR: 01010000 00000101 01100111 00000001
+MC2MISC: 01010000 00000101 01100111 00000001
Bank: 3 (0x40c)
MC3CTL: 00000000 00000000 00000000 00000111
MC3STATUS: 00000000 00000000 00000000 00000000
-MC3ADDR: 11000010 10100000 11011101 01111011
+MC3ADDR: 11000010 10100000 10011101 01001111
MC3MISC: 00000000 00000000 00000000 00000000
Bank: 4 (0x410)
@@ -348,6 +348,6 @@
MTRRdefType (0x2ff): 0x0000000000000c00
-1.80GHz processor (estimate).
+1.00GHz processor (estimate).
--------------------------------------------------------------------------
--- minicom_orig.cap 2008-10-22 00:59:28.000000000 +0200
+++ minicom_fidvid.cap 2008-10-22 00:59:44.000000000 +0200
@@ -1,6 +1,6 @@
-coreboot-2.0.0.0Fallback Tue Oct 21 23:24:27 CEST 2008 starting...
+coreboot-2.0.0.0Fallback Wed Oct 22 00:12:56 CEST 2008 starting...
*sysinfo range: [000cf000,000cf730)
bsp_apicid=00
Enabling routing table for node 00 done.
@@ -12,13 +12,23 @@
SBLink=00
NC node|link=00
begin msr fid, vid 310a12120a0b0202
+Current fid_cur: 2
+Requested fid_new: b
+FidVid table fidvid: 2
+FidVid table fidvid: 2
+FidVid table fidvid: 2
+FidVid table fidvid: 2
+FidVid table fidvid: 2
+FidVid table fidvid: 2
+FidVid table fidvid: 2
+FidVid table fidvid: 2
set fid failed for apicid =00
-end msr fid, vid 310a120a0a0b020a
+end msr fid, vid 310a120a0a0b0202
mcp55_num:01
ht reset -
-coreboot-2.0.0.0Fallback Tue Oct 21 23:24:27 CEST 2008 starting...
+coreboot-2.0.0.0Fallback Wed Oct 22 00:12:56 CEST 2008 starting...
*sysinfo range: [000cf000,000cf730)
bsp_apicid=00
Enabling routing table for node 00 done.
@@ -29,9 +39,19 @@
started ap apicid: 01
SBLink=00
NC node|link=00
-begin msr fid, vid 310a120a0a0b020a
+begin msr fid, vid 310a120a0a0b0202
+Current fid_cur: 2
+Requested fid_new: b
+FidVid table fidvid: 2
+FidVid table fidvid: 2
+FidVid table fidvid: 2
+FidVid table fidvid: 2
+FidVid table fidvid: 2
+FidVid table fidvid: 2
+FidVid table fidvid: 2
+FidVid table fidvid: 2
set fid failed for apicid =00
-end msr fid, vid 310a120a0a0b020a
+end msr fid, vid 310a120a0a0b0202
mcp55_num:01
Ram1.00
setting up CPU00 northbridge registers
@@ -50,13 +70,13 @@
Addr Timing= 00202220
Initializing memory: done
Setting variable MTRR 2, base: 0MB, range: 512MB, type WB
-set DQS timing:RcvrEn:Pass1: 00 CTLRMaxDelay=10 done
+set DQS timing:RcvrEn:Pass1: 00 CTLRMaxDelay=03 done
set DQS timing:DQSPos: 00 done
-set DQS timing:RcvrEn:Pass2: 00 CTLRMaxDelay=53 done
-Total DQS Training : tsc [00]=000000002c69f462
-Total DQS Training : tsc [01]=000000002d6d17b1
-Total DQS Training : tsc [02]=000000003de0735c
-Total DQS Training : tsc [03]=000000003f3275f1
+set DQS timing:RcvrEn:Pass2: 00 CTLRMaxDelay=57 done
+Total DQS Training : tsc [00]=000000001b0f598a
+Total DQS Training : tsc [01]=000000001b985d62
+Total DQS Training : tsc [02]=00000000255082c6
+Total DQS Training : tsc [03]=00000000262dc15e
Ram4
v_esp=000cedc8
testx = 5a5a5a5a
@@ -67,10 +87,10 @@
Uncompressing coreboot to RAM.
src=fffdf000
dst=00100000
-coreboot_ram.nrv2b length = 0000debf
-coreboot_ram.bin length = 00028058
+coreboot_ram.nrv2b length = 0000debb
+coreboot_ram.bin length = 00028044
Jumping to coreboot.
-coreboot-2.0.0.0Fallback Tue Oct 21 23:24:27 CEST 2008 booting...
+coreboot-2.0.0.0Fallback Wed Oct 22 00:12:56 CEST 2008 booting...
Enumerating buses...
scan_static_bus for Root Device
APIC_CLUSTER: 0 enabled
@@ -960,7 +980,7 @@
Moving GDT to 0x500...ok
Adjust low_table_end from 0x00000530 to 0x00001000
Adjust rom_table_end from 0x000f0400 to 0x00100000
-Wrote coreboot table at: 00000530 - 00000e84 checksum e137
+Wrote coreboot table at: 00000530 - 00000e74 checksum 2608
elfboot: Attempting to load payload.
rom_stream: 0xfffc0000 - 0xfffdefff
@@ -998,8 +1018,8 @@
lb_size = 0x00046000
adjust = 0x1feba000
buffer = 0x1ff74000
- elf_boot_notes = 0x00127034
-adjusted_boot_notes = 0x1ffe1034
+ elf_boot_notes = 0x00127020
+adjusted_boot_notes = 0x1ffe1020
FILO version 0.5.6 ([EMAIL PROTECTED]) Tue Sep 30 17:17:15 CEST 2008
menu: hda1:/grub/menu.lst
hda: LBA 4035MB: CF Card
--- dmesg1.txt 2008-10-22 01:25:22.000000000 +0200
+++ dmesg2.txt 2008-10-22 01:25:22.000000000 +0200
@@ -51,7 +51,7 @@
Enabling unmasked SIMD FPU exception support... done.
Initializing CPU#0
PID hash table entries: 2048 (order: 11, 8192 bytes)
-Detected 1799.999 MHz processor.
+Detected 1000.000 MHz processor.
Console: colour dummy device 80x25
console [tty0] enabled
console [ttyS0] enabled
@@ -68,7 +68,7 @@
.text : 0xc0100000 - 0xc02ba0a3 (1768 kB)
Checking if this processor honours the WP bit even in supervisor mode...Ok.
CPA: page pool initialized 1 of 1 pages preallocated
-Calibrating delay using timer specific routine.. 3603.38 BogoMIPS (lpj=7206778)
+Calibrating delay using timer specific routine.. 2002.28 BogoMIPS (lpj=4004565)
Security Framework initialized
SELinux: Disabled at boot.
Capability LSM initialized
@@ -90,7 +90,7 @@
CPU0: AMD Athlon(tm) 64 X2 Dual Core Processor 3600+ stepping 01
Booting processor 1/1 ip 6000
Initializing CPU#1
-Calibrating delay using timer specific routine.. 3600.29 BogoMIPS (lpj=7200581)
+Calibrating delay using timer specific routine.. 2000.14 BogoMIPS (lpj=4000288)
CPU: L1 I Cache: 64K (64 bytes/line), D cache 64K (64 bytes/line)
CPU: L2 Cache: 512K (64 bytes/line)
CPU 1(2) -> Core 1
@@ -98,7 +98,7 @@
Intel machine check reporting enabled on CPU#1.
CPU1: AMD Athlon(tm) 64 X2 Dual Core Processor 3600+ stepping 01
Brought up 2 CPUs
-Total of 2 processors activated (7203.67 BogoMIPS).
+Total of 2 processors activated (4002.42 BogoMIPS).
CPU0 attaching sched-domain:
domain 0: span 0-1
groups: 0 1
--- cpu1.txt 2008-10-22 01:25:22.000000000 +0200
+++ cpu2.txt 2008-10-22 01:25:22.000000000 +0200
@@ -4,7 +4,7 @@
model : 107
model name : AMD Athlon(tm) 64 X2 Dual Core Processor 3600+
stepping : 1
-cpu MHz : 1799.999
+cpu MHz : 1000.000
cache size : 512 KB
physical id : 0
siblings : 2
@@ -21,7 +21,7 @@
cpuid level : 1
wp : yes
flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht syscall nx mmxext fxsr_opt rdtscp lm 3dnowext 3dnow pni cx16 lahf_lm cmp_legacy svm extapic cr8_legacy 3dnowprefetch
-bogomips : 3603.38
+bogomips : 2002.28
clflush size : 64
power management: ts fid vid ttp tm stc 100mhzsteps
@@ -31,7 +31,7 @@
model : 107
model name : AMD Athlon(tm) 64 X2 Dual Core Processor 3600+
stepping : 1
-cpu MHz : 1799.999
+cpu MHz : 1000.000
cache size : 512 KB
physical id : 0
siblings : 2
@@ -48,7 +48,7 @@
cpuid level : 1
wp : yes
flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht syscall nx mmxext fxsr_opt rdtscp lm 3dnowext 3dnow pni cx16 lahf_lm cmp_legacy svm extapic cr8_legacy 3dnowprefetch
-bogomips : 3600.29
+bogomips : 2000.14
clflush size : 64
power management: ts fid vid ttp tm stc 100mhzsteps
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