Author: hailfinger
Date: 2008-10-23 03:18:30 +0200 (Thu, 23 Oct 2008)
New Revision: 946
Added:
coreboot-v3/mainboard/via/
coreboot-v3/mainboard/via/Kconfig
coreboot-v3/mainboard/via/epia-cn/
coreboot-v3/mainboard/via/epia-cn/Makefile
Modified:
coreboot-v3/mainboard/Kconfig
Log:
First parts of VIA EPIA-CN support.
Signed-off-by: Carl-Daniel Hailfinger <[EMAIL PROTECTED]>
Acked-by: Ronald G. Minnich <[EMAIL PROTECTED]>
Modified: coreboot-v3/mainboard/Kconfig
===================================================================
--- coreboot-v3/mainboard/Kconfig 2008-10-23 00:28:28 UTC (rev 945)
+++ coreboot-v3/mainboard/Kconfig 2008-10-23 01:18:30 UTC (rev 946)
@@ -5,6 +5,7 @@
## Copyright (C) 2006-2007 coresystems GmbH
## (Written by Stefan Reinauer <[EMAIL PROTECTED]> for coresystems GmbH)
## Copyright (C) 2007 Uwe Hermann <[EMAIL PROTECTED]>
+## Copyright (C) 2008 Carl-Daniel Hailfinger
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
@@ -62,6 +63,11 @@
help
Select this option for PC Engines systems.
+config VENDOR_VIA
+ bool "VIA"
+ help
+ Select this option for VIA systems.
+
endchoice
source "mainboard/adl/Kconfig"
@@ -71,6 +77,7 @@
source "mainboard/emulation/Kconfig"
source "mainboard/gigabyte/Kconfig"
source "mainboard/pcengines/Kconfig"
+source "mainboard/via/Kconfig"
choice
prompt "ROM chip size"
Added: coreboot-v3/mainboard/via/Kconfig
===================================================================
--- coreboot-v3/mainboard/via/Kconfig (rev 0)
+++ coreboot-v3/mainboard/via/Kconfig 2008-10-23 01:18:30 UTC (rev 946)
@@ -0,0 +1,43 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2008 Carl-Daniel Hailfinger
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; either version 2 of the License, or
+## (at your option) any later version.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+##
+
+choice
+ prompt "Mainboard model"
+ depends on VENDOR_VIA
+
+config BOARD_VIA_EPIA_CN
+ bool "EPIA-CN"
+ select ARCH_X86
+ select CPU_VIA_C7
+ select OPTION_TABLE
+ select NORTHBRIDGE_VIA_CN700
+ select SOUTHBRIDGE_VIA_VT8237
+ select SUPERIO_VIA_VT1211
+ select PIRQ_TABLE
+ help
+ VIA EPIA-CN
+
+endchoice
+
+config MAINBOARD_DIR
+ string
+ default via/epia-cn
+ depends BOARD_VIA_EPIA_CN
+
Added: coreboot-v3/mainboard/via/epia-cn/Makefile
===================================================================
--- coreboot-v3/mainboard/via/epia-cn/Makefile (rev 0)
+++ coreboot-v3/mainboard/via/epia-cn/Makefile 2008-10-23 01:18:30 UTC (rev
946)
@@ -0,0 +1,32 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2008 Carl-Daniel Hailfinger
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; either version 2 of the License, or
+## (at your option) any later version.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+##
+
+STAGE0_MAINBOARD_SRC := $(src)/mainboard/$(MAINBOARDDIR)/stage1.c
+
+INITRAM_SRC = $(src)/mainboard/$(MAINBOARDDIR)/initram.c \
+ $(src)/northbridge/via/cn700/initram.c \
+ $(src)/lib/ramtest.c
+
+STAGE2_MAINBOARD_SRC =
+
+$(obj)/coreboot.vpd:
+ $(Q)printf " BUILD DUMMY VPD\n"
+ $(Q)dd if=/dev/zero of=$(obj)/coreboot.vpd bs=256 count=1 $(SILENT)
+
--
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